A code stream buffer system and video decoder

Abstract

The invention belongs to the technical field of data decoding, and provides a code stream cache system and a video decoder. The code stream cache system comprises an annular code stream cache unit and a control unit, wherein a physical storage space of the annular code stream cache system comprises a first storage space and a second storage space, wherein the first storage space is equal to the second storage space in size. The control unit is used for controlling the first storage space to read a code stream to be decoded from an external memory, and at the same time, the control unit is used for controlling a decoding unit to read a code stream to be decoded from the second storage space. The control unit is used for controlling the second storage space to read a code stream to be decoded from the external memory, and at the same time, the control unit is used for controlling the decoding unit to read a code stream to be decoded from the first storage space. According to the code stream cache system, the purpose that video data are decoded by utilizing of the annular code stream cache unit is achieved, in the process of decoding, and the times that the decoding unit visits the external memory are reduced. Compared with the prior art, the times that the code stream is carried in the process of caching are reduced, code stream access speed from the external memory to the decoding unit is accelerated, and consumption produced when the code stream to be decoded is cached is reduced.

Description

Technical field [0001] The invention belongs to the technical field of data decoding, and particularly relates to a code stream buffer system and a video decoder. Background technique [0002] In the process of decoding video data with mixed length, since the code stream is operated on a bit-by-bit basis rather than a byte-wise operation, each clock cycle requires a mixed-length decoder to access the off-chip memory, and in order to determine a new codeword At the boundary, the mixed-length decoder needs to feed back the decoded code stream length to the off-chip memory, so the code stream address resolution logic has high power consumption, which requires a code stream cache system between the mixed-length decoder and the off-chip memory. The stream buffer system is used as a bridge between off-chip memory and mixed-length decoder. [0003] figure 1 The principle of a typical code stream buffer system provided by the prior art is shown, which includes a first register, a second r...

AI Technical Summary

Problems solved by technology

[0006] The purpose of the embodiment of the present invention is to provide a code stream buffer system, which aims to solve the problem that the code stream buffer system provided by the prior art requires the cooperation of three registers and a bidirectional shift register to complete the operation of decoding buffer, and the throughput of the system Up to, low efficiency, high power consumption

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