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Access method of dual-separation gate flash memory

An access method and a technology of separating gates, which are applied in the field of memory, can solve the problem of high error probability of chip configuration information, reduce the probability of storing configuration information in registers, increase the current reading margin, and reduce the probability of error Effect

Active Publication Date: 2013-07-10
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0009] The present invention solves the problem of high error probability when reading chip configuration information

Method used

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  • Access method of dual-separation gate flash memory
  • Access method of dual-separation gate flash memory

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Embodiment Construction

[0022] As described in the background art, after the chip configuration information is read out from the double split gate flash memory array, errors in the read configuration information are prone to occur. In order to better understand the principle and effect of the technical solution of the present invention, the technical problems to be solved by the technical solution of the present invention are analyzed in detail below.

[0023] Reading the chip configuration information is during the power-on period of the system including the central processing unit and the chip. The power supply voltage of the system has not yet stabilized, and the reference voltage required to read the configuration information has not stabilized. Therefore, the current value read from the memory It is lower than the current value read in the stable state of the power supply voltage, that is, the read current margin is small. The so-called read current margin refers to the difference between the cu...

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Abstract

The invention discloses an access method of a dual-separation gate flash memory. The access method comprises a step of: correspondingly writing each bit of data of at least one data sequence into a first storage bit and a second storage bit of a storage unit. According to the access method of the dual-separation gate flash memory, provided by the technical scheme, when configuration information is read out from the memory, the current reading margin is increased, and the error probability of reading of the configuration information out from the memory is reduced.

Description

technical field [0001] The invention relates to the technical field of memory, in particular to an access method of a double split gate flash memory. Background technique [0002] In the production process of the chip, due to the deviation of the manufacturing process, the timing and internal voltage of the chip will be inconsistent, that is, there is a deviation. During the chip testing process, the timing and voltage information of all chips will be measured, the chips with deviations will be adjusted, and the adjustment information will be recorded for the central processing unit of the system to call. The adjustment information is the configuration information of the chip. The configuration information generally includes a synchronization waiting time, a burst reading waiting time, a burst writing waiting time, and the like. [0003] Since the central processing unit of the system cannot directly call the configuration information of the chip, the chip configuration inf...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/20G06F12/02
Inventor 杨光军
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP