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Dual DNW isolation structures for reducing RF noise on high voltage semiconductor devices

A semiconductor and device technology, applied in the field of deep N-well isolation structure, can solve problems such as adverse effects on operation

Active Publication Date: 2013-07-10
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Substrate noise coupling is an effect of concern because it can adversely affect the operation of various other devices

Method used

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  • Dual DNW isolation structures for reducing RF noise on high voltage semiconductor devices
  • Dual DNW isolation structures for reducing RF noise on high voltage semiconductor devices
  • Dual DNW isolation structures for reducing RF noise on high voltage semiconductor devices

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Embodiment Construction

[0030] According to various embodiments, figure 1 The structure shown is located above a substrate 2 which is part of an integrated circuit or other semiconductor device which operates at high frequencies and high voltages and which includes at least one source of electronic noise, e.g. noise or other EM (electromagnetic) noise. Integrated circuits also include numerous other devices, signals, and other components that are desired to be isolated from electrical noise. In one embodiment, figure 1 The structure shown is part of a system-on-chip integrated circuit that includes digital, analog, mixed-signal, and radio frequency functions on a single chip substrate. In another embodiment, a system-on-chip integrated circuit includes less than all of the functions listed above.

[0031] Radio Frequency (RF) is an oscillating frequency in the range of approximately 3 kHz to 300 GHz, which corresponds to the frequency of radio waves and to the alternating current that carries the ...

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Abstract

An isolation structure in a semiconductor device absorbs electronic noise and prevents substrate leakage currents from reaching other devices and signals. The isolation structure provides dual deep N-well ("DNW") isolation structures surrounding an RF device or other source of electronic noise. The DNW isolation structures extend into the substrate at a depth of at least about 2.5 [mu]m and may be coupled to VDD. P+ guard rings are also provided in some embodiments and are provided inside, outside or between the dual DNW isolation structures. The invention also provides the dual DNW isolation structures for reducing RF noise on high voltage semiconductor devices.

Description

technical field [0001] The present invention relates to semiconductor devices, and more particularly, to deep N-well isolation structures for reducing electronic noise. Background technique [0002] RF (Radio Frequency) semiconductor devices operate at high frequency bands and generate electronic noise that may adversely affect other elements of a circuit including the noise-generating device, other devices located over a substrate including the circuit, and forming other devices on top of other components in close proximity to the noise. This penalty is true for the various elements that are combined to form a package or other assembly, including RF devices, as well as for system-on-chip (SoC) technology. Especially for high voltage applications such as HVMOS (High Voltage Metal Oxide Semiconductor) devices do have adverse effects on other components. The noise source may be a device formed over the substrate, and the noise source operates at high (RF) frequency or high v...

Claims

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Application Information

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IPC IPC(8): H01L23/552H01L27/02
CPCH01L21/823892H01L21/761H01L27/0928
Inventor 黄崎峰陈家忠梁其翔李孝纯
Owner TAIWAN SEMICON MFG CO LTD
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