Polar transmitter having frequency modulating path with interpolation in compensating feed input and related method thereof

Abstract

A frequency modulating path for generating a frequency modulated clock includes a direct feed input arranged for directly modulating frequency of an oscillator, and a compensating feed input arranged for compensating effects of frequency modulating on a phase error; wherein the compensating feed input is resampled by a down-divided clock that is an integer edge division of the oscillator. A reference phase generator for generating a reference phase output includes a resampling circuit, an accumulator and a sampler. The resampling circuit is for resampling a modulating frequency command word (FCW) input to produce a plurality of samples. The accumulator is for accumulating the samples to generate an accumulated result. The sampler is for sampling the accumulated result according to a frequency reference clock, and accordingly generating a sampled result, wherein the reference phase output is updated according to at least the sampled result.

Description

technical field [0001] The present invention relates to frequency modulating paths and methods, and more particularly to a polar transmitter with a frequency modulating path interpolating a compensating feed input and related methods. Background technique [0002] The digital polar transmitter has several advantages, such as reducing the complexity of the modulation path and current consumption, while solving the problem of image rejection (image rejection), so the polar transmitter is more suitable for application in advanced complementary metal oxide semiconductor (CMOS) In process. More specifically, the digital polar transmitter is capable of decomposing a complex fundamental frequency signal into an amplitude-modulated (AM) component and a phase-modulated (PM) component (rather than the same phase (in-phase) component and a quadrature phase (quadraturephase) component), the two components are then recombined into a radio-frequency (radio-frequency, RF) output and propa...

AI Technical Summary

Problems solved by technology

However, it is generally assumed that the clock used by the transmitter (transmitter, TX) circuit is a time-invariant clock frequency, so when the clock actually used has a time-varying clock frequency, it will affect several operations

An existing solution is to make the frequency divider operate at a high frequency to compensate for the frequency deviation effect and obtain a clean clock. However, this approach will increase the chip area and power consumption, because most of the Apps are penny-pinching on cost, so this is not practical

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