Self-indexing register file pile device

A register file and self-indexing technology, applied in memory address/allocation/relocation, sustainable building, energy-saving computing, etc., can solve problems such as hardware logic redundancy, reduce the number of memory accesses, avoid programming complexity, and fully The effect of using

Active Publication Date: 2013-08-07
BEIJING SMART LOGIC TECH CO LTD
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Problems solved by technology

For example, the Chinese invention patent publication with the application number 02126222.5 and the invention name "A Reconfigurable Register File and Its Design Method" proposes a reconfigurable register file design method that is compatible with multiple instructions. The hardware converts the target address and physical address of the accessed register number in the new instruction set, so as to achieve instruction-level reconstruction. This idea is relatively new, but for the processor determined by the instruction set, this part of the hardware logic is redundant.

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  • Self-indexing register file pile device
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  • Self-indexing register file pile device

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Embodiment Construction

[0026] The invention proposes a special register file file device. The register file file device includes a register file unit (register storage bank) and peripheral logic of the register storage bank.

[0027] The register file heap device is applicable to many different calculation-intensive algorithms, and according to different algorithms, the registered storage banks can be configured as "self-index area" and "common area". Among them, the size of the self-index area, the initial register number and other information can be flexibly configured, and the common area is indexed by the constant register number. After the self-index area information is configured, the user only needs to initiate a read-write start signal, and the register file stack device can automatically calculate the current required index number, and both read and write are in the specified self-index area. After the boundary, the next operation will automatically go to the starting position of the index ...

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Abstract

The invention discloses a self-indexing register file pile device. The self-indexing register file pile device comprises a register storage body and peripheral logic of the register storage body, wherein the register storage body is configured to have a self-indexing region and a common region; the size of the self-indexing region and a starting register number can be configured flexibly; and a literal register number way is adopted for indexing in the common region. The register file pile device when initiating a reading-writing startup signal calculates the currently necessary index number automatically, and the reading and writing operations are within the self-indexing region; and when the reading and writing operations reach to the border of the self-indexing region, the next operation is turned to the starting position of the self-indexing region automatically. The self-indexing register file pile device has programming convenience and can save power consumption of a processor.

Description

technical field [0001] The invention mainly relates to the technical field of integrated circuit design, in particular to the structure of a processor register file stack, which is closely related to ASIC (Application Specific Integrated Circuit) design and integrated circuit structure. Background technique [0002] Whether it is a CISC (Complex Instruction Set Computer) processor or a RISC (Reduced Instruction Set Computer) processor, designing general-purpose registers inside the processor core is a common method. High-speed registers can greatly accelerate the speed of data exchange. For small data operations, the intermediate result data does not need to be written into a relatively slow memory, and the data is directly exchanged inside the core through the register file to improve the operation speed. [0003] For application-specific processors (ASIPs), especially computing-intensive processors, how to improve data utilization in specific algorithms while using the pri...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/02
CPCY02B60/1225Y02D10/00
Inventor 王东琳尹磊祖杨勇勇谢少林张星吴军宁
Owner BEIJING SMART LOGIC TECH CO LTD
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