Microprocessor data flow address matching self-trapping device used for software debugging

Abstract

The invention discloses a microprocessor data flow address matching self-trapping device. The microprocessor data flow address matching self-trapping device comprises a set of data flow address matching control registers with configurable software, data flow address matching judgment logic, data flow address matching self-trapping generation logic of precise interrupts and microprocessor operating state storage logic, wherein if a data flow address meets specified requirements of the data flow address matching control registers, data flow address self-trapping of the precise interrupts is generated, and a processor can reserve an operating state, and not only facilitates program debugging for a user, but also provides powerful support for operating system debugging. The microprocessor data flow address matching self-trapping device supports software in a specified matching pattern (equal match or unequal match), specifying the type of 'an address to be matched'(a virtual address or a physical address) and specifying the bit width of 'the address to be matched'(a full address or a partial address), and means of software debugging are richened. According to the microprocessor data flow address matching self-trapping device, existing access and storage hardware logic is effectively used for achieving the function, and hardware design complexity and hardware cost need not to be increased obviously.

Description

technical field [0001] The invention relates to a microprocessor data flow address matching trapping device. Background technique [0002] At present, the support provided by microprocessors for software debugging is generally limited to the software-based "single-step trap" method. This method: the software can add a single-step self-trap breakpoint in the program. When the processor executes the instruction where the breakpoint is located, it will generate a precise breakpoint self-trap and give the control of the processor to the "single-step self-trap" "Trap" handler, which reads the system image visible to the processor's internal software through instructions, including structural registers, memory and microprocessor internal status registers, providing support for software debugging. [0003] When this method debugs the memory access operation in the program, there are two disadvantages: 1. When the value of a variable in the memory is accidentally modified, it is ve...

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Problems solved by technology

[0003] When this method debugs the memory access operation in the program, there are two disadvantages: 1. When the value of a variable in the memory is accidentally modified, it is very difficult to determine which instruction modified the value of the variable, and often needs to be checked in the program. Set multiple breakpoints in , and gradually narrow the scope of suspicion by analyzing the variable values ​​at each breakpoint, and finally determine the instruction position to modify the variable

2. Since the same memory access instruction may be executed multiple times during program execution, and the memory access address of each instruction may be different, therefore, even if the erroneous instruction is determined, it is difficult to determine which execution of the instruction occurred mistake

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