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Error response circuit, semiconductor integrated circuit, and data transfer control method
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A data transmission control and error response technology, applied in the direction of electrical digital data processing, data processing power supply, error detection/correction, etc., can solve the problem of improper stop of data transmission, circuit segment failure to respond and return, circuit segment suspension, etc. question
Active Publication Date: 2013-10-23
SOCIONEXT INC
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[0005] However, when the above data transfer is performed and the circuit section that is the target of the transfer command enters the low power consumption state, there is a problem that the circuit section that is the target of the transfer command cannot return a response to the circuit section that is the source of the transfer command. Happening
For example, if the circuit section that is the target of the transfer command enters a low power consumption state during data transmission, or if the transfer command is transmitted from the source circuit section while the circuit section that is the target of the transfer command is in the low power consumption state, then There is a possibility that the source circuit segment cannot receive the response signal
In this case, data transfer is unduly stopped and the circuit section that is the source of the transfer command cannot continuously perform processing
That is, the circuit segment that is the source of the transmit command may hang
Method used
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no. 1 example ）
[0024] figure 1 is an example of the semiconductor integrated circuit according to the first embodiment.
[0025] The semiconductor integrated circuit 10 includes: a circuit section 11 (hereinafter referred to as a master device) that is a source of a command such as a transfer command, a circuit section 12 that is a target of the command and returns a response signal to the command to the master device 11 (hereinafter referred to as a slave device), an internal bus 13 , and a power control circuit section 14 . In addition, the semiconductor integrated circuit 10 according to the first embodiment includes an error response circuit 15 . exist figure 1 In the example of , the error response circuit 15 is arranged between the internal bus 13 and the slave device 12 . However, the error response circuit 15 can also be arranged between the master device 11 and the internal bus 13 .
[0026] exist figure 1 In , the flow of signals transmitted to or received from each circuit se...
no. 2 example ）
[0042] figure 2 is an example of the semiconductor integrated circuit according to the second embodiment.
[0043] The semiconductor integrated circuit 20 includes a plurality of master devices 21-1, 21-2, ..., and 21-m, a plurality of slave devices 22-1, 22-2, ..., and 21-n, an internal bus 23, a system A mode controller 24 and a plurality of error response circuits 25-1, 25-2, . . . , and 25-n.
[0044] exist figure 2 In the example of , the error response circuits 25 - 1 to 25 - n are arranged between the slave devices 22 - 1 to 21 - n and the internal bus 23 . However, the error response circuits 25 - 1 to 25 - n may also be arranged between the master devices 21 - 1 to 21 - m and the internal bus 23 .
[0045] in addition, figure 2 The number of master devices 21-1 to 21-m, slave devices 22-1 to 22-n, and error response circuits 25-1 to 25-n shown is three or more. However, there is no limit to this number. m or n is set to any value greater than or equal to 1.
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Abstract
In an error response circuit an analysis circuit unit analyzes a command transmitted from a first circuit section to a second circuit section, and detects a status of data transfer between the first circuit section and the second circuit section. A response circuit unit generates an error signal in accordance with the detected status of the data transfer in response to the second circuit section changing from a first power consumption state to a second power consumption state in which power consumption is lower than power consumption in the first power consumption state. A switching circuit unit transmits the error signal to the first circuit section in place of a response signal that is responsive to the command and transmitted from the second circuit section to the first circuit section.
Description
technical field [0001] Embodiments discussed herein relate to an error response circuit, a semiconductorintegrated circuit, and a data transmission control method. Background technique [0002] In recent years, further reductions in power consumption of electronic devices, semiconductor integrated circuits, and the like have been sought. Controlling power supply to a circuit section, stopping an operation clock for a circuit, and the like may be employed as a method for reducing power consumption. [0003] Incidentally, for example, when data transfer is performed in a semiconductorintegrated circuit, the circuit section that is the target of the transfer command returns a response to the transfer command to the circuit section that is the source of the transfer command. The source circuit segment waits until it receives a response. One of the standards for such data transfer involving handshaking is AMBA (Advanced MicrocontrollerBus Architecture). AMBA is employed in ...
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