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Output/input interface of chip packaging structure and configuration method thereof

A chip packaging structure, input and output technology, applied in the direction of electrical components, electrical solid devices, circuits, etc., can solve problems such as the decline in product competitiveness

Inactive Publication Date: 2013-10-23
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, limited by the number of pins, the traditional chip packaging structure can only perform specific functions, and cannot perform other functions by adding pins, resulting in a decline in product competitiveness

Method used

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  • Output/input interface of chip packaging structure and configuration method thereof
  • Output/input interface of chip packaging structure and configuration method thereof
  • Output/input interface of chip packaging structure and configuration method thereof

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Embodiment Construction

[0020] The I / O interface of the chip package structure and its configuration method of the present invention use an alternative pin to replace one of the existing I / O pins. The existing I / O pins are, for example, the outer pins of a metal leadframe (Leadframe), the number of which has been fixed when the leadframe is formed, while the inner pins of the metal leadframe and the integrated circuit are covered in the package , and its outer pins extend out of the package to become the input and output pins connected to the integrated circuit. An alternative pin is, for example, a metal pad, and the metal pad can be a metal material including copper or aluminum. In addition, alternative pins may also be pads formed of non-metallic conductive substances (such as graphite). When an alternative pin replaces one of the existing I / O pins, one more I / O pin is available, and this pin can be redefined to give a new function. For example, when the original voltage signal pin is replaced b...

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PUM

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Abstract

The invention discloses an output / input interface of a chip packaging structure and a configuration method thereof, wherein the output / input interface is used in the chip packaging structure. The chip packaging structure includes an integrated circuit and a packaging body covering the integrated circuit. The output / input interface comprises multiple output / input pins and a substitutional pin, wherein the output / input pins are arranged in the periphery of the packaging body, and consist of two data signal pins, three control signal pins, two voltage signal pins and a frequency signal pin which are connected with the integrated circuit, and the substitutional pin is used for substituting one of the output / input pins.

Description

technical field [0001] The present invention relates to a chip packaging structure, and in particular to an input / output interface of the chip packaging structure and a configuration method thereof. Background technique [0002] The serial peripheral interface (Serial peripheral interface, SPI) transmission interface traditionally has an advantage compared with the parallel transmission interface, that is, the serial peripheral interface has a simpler connection method, and the number of input and output pins is less, so as to reduce chip The cost of the package structure. In addition, as the frequency speed increases day by day, the advantage of the transmission speed of the parallel transmission interface becomes less and less important. However, in applications where speed and simplicity are important, it is still desirable to continue using the standard Serial Peripheral Interface (SPI) while increasing its transfer speed. [0003] However, limited by the number of pin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/50H01L21/60
Inventor 洪俊雄张坤龙陈耕晖谢明志
Owner MACRONIX INT CO LTD