Packaging structure

Abstract

The invention discloses a packaging structure which comprises a carrier plate, at least one chip structure arranged on the carrier plate, a molding compound layer wrapping and directly contacting the chip structure, and a plurality of filler particles uniformly distributed in the molding compound layer, wherein each filler particle includes a dielectric core, an insulation layer wrapping the dielectric core, and a conductive layer arranged between the dielectric core and the insulation layer and forwardly wrapping the dielectric core.

Description

technical field [0001] The invention relates to a packaging structure, in particular to a packaging structure used for chip packaging. Background technique [0002] As we all know, packaging technology is actually to isolate the chip from the outside world to protect the chip circuit and avoid electrical performance degradation. On the other hand, the packaged chip is also easier to install and transport. The quality of the packaging technology also directly affects the performance of the chip itself The play and the design and manufacture of the PCB (printed circuit board) connected to it, so it is crucial. [0003] With the development of memory, the existing two-dimensional packaging technology is gradually replaced by three-dimensional packaging technology. The advantage of three-dimensional packaging is that it can increase the density of interconnect lines and reduce the package size (form factor). In the three-dimensional packaging of chip stacking, the chips are bon...

AI Technical Summary

Problems solved by technology

[0005] The invention provides a packaging structure to solve the defect of electromagnetic interference between different packaging structures

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