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Self-adaptive low drop regulator

A technology of low-dropout linearity and voltage regulators, which is applied in the direction of instruments, electric variable adjustment, control/regulation systems, etc., and can solve the problems of negative feedback network open-loop gain reduction, minimum operating voltage limitation, and error amplifier 110 not working properly, etc.

Active Publication Date: 2013-11-06
SAMSUNG SEMICON CHINA RES & DEV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Second, the minimum working voltage limit
As VDD decreases, especially when the low dropout linear regulator is fully loaded (at this time, |V GS1 | is a relatively large value), the NMOS transistor M8 will be in the linear region, causing the error amplifier 110 to fail to work normally, the open-loop gain of the negative feedback network will decrease, and the output voltage VOUT of the low dropout linear regulator will also decrease accordingly , causing the LDO function to malfunction

Method used

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Embodiment Construction

[0025] Exemplary embodiments of the present invention will now be described in detail, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like parts throughout.

[0026] Figure 4 is a diagram showing a low dropout linear regulator (LDO) according to an exemplary embodiment of the present invention.

[0027] Such as Figure 4 As shown, the low dropout linear regulator according to the exemplary embodiment of the present invention includes an error amplifier 410 , a source follower (Source follower) 420 and an LDO output stage circuit 430 . exist Figure 4 Among them, error amplifier 410, NMOS transistor M11, PMOS transistor M1, resistor R 1 and R 2 form a negative feedback network. The error amplifier 410 and the LDO output stage circuit 430 are respectively connected with figure 1 The functions and structures of the error amplifier 110 and the LDO output stage circuit 120 shown in FIG.

[0028] By introducing a sour...

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Abstract

The invention provides a low drop regulator (LDO) which comprises an error amplifier and an LDO output stage circuit, wherein the error amplifier compares regulator output signals produced by the LDO output stage circuit with reference voltage, and outputs control signals used for controlling the LDO output stage circuit. The LDO is characterized by further comprising a source follower circuit which is positioned between an output end of the error amplifier and a control end of the LDO output stage circuit for receiving the control signals outputted by the error amplifier; the control signals outputted by the output end of the source follower circuit are used for controlling the LDO output stage circuit.

Description

technical field [0001] The present application relates to a low-dropout linear regulator (LDO), and more particularly, to an adaptive low-dropout linear regulator suitable for low-voltage situations. Background technique [0002] figure 1 is a diagram showing a prior art low dropout linear regulator (LDO). Such as figure 1 As shown, the prior art low dropout linear regulator includes an error amplifier 110 and an LDO output stage circuit 120 . [0003] figure 2 is showing figure 1 A diagram of the error amplifier 110 in FIG. Such as figure 2 As shown, the error amplifier 110 is composed of several PMOS transistors and NMOS transistors, and the output terminal of the error amplifier 110 drives the PMOS transistor M1. The LDO output stage circuit 120 includes a PMOS transistor M1, a resistor R 1 and R 2 , voltage stabilizing capacitor C L and load resistor R L . figure 1 The illustrated error amplifier 110 compares the regulator output signal VOUT generated by th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/56
Inventor 方狄
Owner SAMSUNG SEMICON CHINA RES & DEV