Detection circuit for detecting clock jitter

Abstract

The invention discloses a detection circuit which can detect clock jitters based on a digital circuit. The detection circuit comprises a delay circuit and a judgment circuit. The delay circuit is used for generating a delay signal. The judgment circuit is connected with the delay circuit in a coupling mode and used for generating a first output signal and a second output signal according to a clock pulse signal and the delay signal. In addition, the judgment circuit compares the first output signal with the second output signal to generate a first detection signal so that whether the clock pulse signal includes the lock jitters or not can be indicated. The common digital circuit which is simple in circuit architecture is adopted, and therefore the effect that the clock jitters are detected can be achieved. Compared with the adapted mode that in the prior art, a phase lock circuit is compared with a reference clock pulse generating circuit or the mode that in the prior art, an external instrument is used for detection, the mode for detecting the clock jitters simplifies the circuit architecture and is low in power consumption, lower in cost, rapid and effective.

Description

technical field [0001] The invention relates to clock jitter, in particular to a detection circuit for detecting clock jitter. Background technique [0002] In the design of high-speed digital circuits, a high-frequency clock signal is required for synchronization between circuits, and the requirements for the accuracy of the clock signal are also relatively high. However, the clock jitter generated by the clock generator will cause the frequency drift of the clock signal, which may further highlight the flaws in the design of the circuit itself, and even lead to malfunction of the circuit. Therefore, the processing of clock jitter It has become an important topic in the design of high-speed digital circuits. [0003] The so-called clock jitter simply means that the phase of the pulse edge of the clock signal will change in advance or delay. In the prior art, there are already some techniques for detecting clock jitter. One of the more intuitive methods is to directly meas...

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Problems solved by technology

[0004] However, the traditional clock jitter detection methods mentioned above involve analog circuits such as phase-locked loops or external instruments, so they are considerable in terms of circuit area, power consumption, time and hardware costs.

Therefore, there is still room for improvement in the prior art

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