A cache management method and device

Abstract

The embodiment of the invention provides a buffer management method and a buffer management device and relates to the field of a computer. The use efficiency of the buffer can be improved, and the system performance is improved. The method is characterized in that the statistical information of memory regions of physical addresses is obtained through a statistical module, the memory regions are classified through a management module according to region marking of the physical addresses and the statistical information, each type of classified memory region is colored so that the colors of the memory regions in different types are different, the mapping relationship in a region color mapping table is updated according to the colored memory regions, the mapping relationship belongs to the mapping between the region marking of the physical addresses and the colors of the memory regions after the coloring, according to the mapping relationship, the data corresponding to the current access physical address is buffered in a buffer region through a color register, and the buffer region corresponds to the color of the memory region of the current access physical addresses in the buffer. The embodiment of the invention is used for carrying out color remapping during the data buffer.

Description

technical field [0001] The invention relates to the field of computers, in particular to a cache management method and device. Background technique [0002] With the advancement of technology, new multi-core and many-core computer systems continue to emerge, including multiple physical CPUs (Central Processing Unit, central processing unit), and each physical CPU contains a large-capacity hardware cache. In the hardware cache structure of modern CPUs, the smallest unit of hardware cache management in the CPU is cache bin (cache line), and multiple Cache lines form a set (set). Among them, the smallest unit of memory management in the OS (Operating System) is page (page), and the number of consecutive sets required for a physical page to be mapped to the CPU hardware cache is a cache bin (cache book), and a cache bin represents a kinds of colors. [0003] When task0 and task1 have pages mapped to the same cache bin, and task0 runs on core0, and task1 runs on core1, it will ...

AI Technical Summary

Problems solved by technology

Due to the inconsistency of management units and the existence of multiple CPUs, it is possible to cause a large number of cache failures, resulting in frequent cache refreshes, which eventually lead to system performance degradation

[0004] In the prior art, page coloring can be used to improve system performance. The basic principle is to control each user-mode process so that it can only access pages of a specific color, that is, introduce coloring strategies when processes are created, and allocate pages through page fault exceptions. Introduce coloring strategies, etc., so as to avoid cache failure during process switching, but this solution is only applicable to user mode, not to kernel mode, and the mapping relationship between page and cache is fixed, and the cache is divided into each process, reducing the usage of the entire cache

Images