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Memory architecture and associated serial direct access circuit

一种存储器架构、存取电路的技术，应用在静态存储器、仪器等方向，能够解决限制测试效率等问题，达到提升效率、优化多晶测试的效果

Active Publication Date: 2014-01-15
EMEMORY TECH INC
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

Furthermore, testing via the parallel interface also limits the efficiency of testing

Method used

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  • Memory architecture and associated serial direct access circuit
  • Memory architecture and associated serial direct access circuit
  • Memory architecture and associated serial direct access circuit

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Embodiment Construction

[0026] Please refer to figure 1 , which shows a circuit block architecture 100 according to an embodiment of the present invention. The circuit block architecture 100 includes a serial direct access circuit 10 (serial direct access circuit: SDA circuit) and a circuit block 20 . In one embodiment, the circuit block 20 is a memory, such as a flash memory, so the circuit block structure 100 is a memory structure. The circuit block 20 includes a plurality of parallel contacts for parallel control and access of the circuit block 20; for example, the circuit block 20 may include parallel address input contacts PA[0] to PA[N] for further Addressed parallel contacts PIFREN and PFUSE, parallel data input contacts PDIN[0] to PDIN[Nin], parallel data output contacts PDOUT[0] to PDOUT[Nout], and some parallel control contacts for receiving parallel control bits, For example, the contacts PPROG, PMASI, PWE, PERASE, PNVSTR, PTM[0] to PTM[Nt], PCE and so on. The circuit block 20 also obta...

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Abstract

The present invention provides a memory architecture and associated serial direct access (SDA) circuit. The memory architecture includes a memory of a parallel interface and a serial direct access (SDA) circuit. The SDA circuit includes an enable pin, a serial pin and an auto-test module. The enable pin receives an enable bit, wherein the SDA circuit is selectively enabled and disabled in response to the enable bit. When the SDA circuit is enabled, the serial pin sequentially relaying a plurality of serial bits, such that each of the serial bits is associated with one of parallel pins of the parallel interface; and in addition, the auto-test module can perform a built-in test of the memory associated with the serial bits.

Description

technical field [0001] The present invention relates to a memory architecture and related serial direct access circuits, and more particularly to a memory architecture and related memory architecture that provides serial access and built-in test functions to support multi-die testing. serial direct access circuit. Background technique [0002] Integrated circuits formed on dies are one of the most important hardware foundations of modern technology. Generally speaking, a die includes many circuit blocks, or called silicon intellectual property (silicon intellectual property). For example, CPU and MCU are commonly used logic circuit blocks. Furthermore, non-volatile and / or volatile embedded memories that can be integrated into dies have also become an indispensable circuit block in modern dies. [0003] All circuit blocks in a chip need to be able to communicate with each other; in order to optimize communication efficiency, each circuit block is provided with a multi-cont...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/12
CPCG11C29/32
Inventor 蔡裕雄黄柏豪沈俊吉黄志豪
Owner EMEMORY TECH INC
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