Disk frame and storage device using the same

Abstract

The invention discloses a disk frame and a storage device using the disk frame. The disk enclosure includes an outer frame body and a backplane assembly, and the backplane assembly includes a master backplane and a slave backplane both fixed in the outer frame; the master backplane and the slave backplane are long strips, and the length direction of the two is the same; The slave backplane is located on one side of the width direction of the main backplane, and there is a gap between the slave backplane and the main backplane; there is a main signal transmission channel on the main backplane; there is a secondary signal transmission channel on the slave backplane, and the secondary Signaling channels are used for signal streams that transmit at a rate lower than the rate of signal flow in the main signaling channel. The backplane assembly is divided into two boards, the main backplane and the slave backplane, and the gap between the main backplane and the slave backplane can be ventilated, so that the overall ventilation capacity of the backplane assembly can be effectively improved, and the heat dissipation performance can be improved; The backplane is used to transmit high-speed signals, and high-quality boards can be used; the slave backplane is used to transmit low-speed signals, and poor-quality boards can be used, thereby effectively reducing costs.

Description

technical field [0001] The invention relates to the field of storage devices, in particular to a disk frame and a storage device using the disk frame. Background technique [0002] With the development of technology, the demand for storage capacity has exploded. Among the interviewed companies, 68.6% mainly value performance when choosing a storage architecture, and 59.5% pay more attention to cost. Due to the pursuit of storage performance by more companies, high-performance PCIe SSDs (solid state drives with PCIe interface standards; PCIe : Peripheral Component InterconnectExpress, fast peripheral interconnection standard) The demand for storage is particularly urgent, and since the price of Flash (the key chip that constitutes SSD) has been reduced to an order of magnitude comparable to that of SAS hard disks, it is foreseeable that PCIe SSDs will be used in There will be more and more applications for primary storage. At present, due to the limitation of the price of P...

AI Technical Summary

Problems solved by technology

[0004] If a PCIe SSD disk is installed in the disk enclosure, due to the enhanced performance of the PCIe SSD disk, the PCIe signal bandwidth needs to be increased accordingly (that is, the number of PCIe Lanes needs to be increased), which will lead to an increase in the number of connectors from the backplane to the cascading board. If only this point is considered and the connector to the cascading board is added to the backplane of the original disk enclosure, it is necessary to remove some openings on the backplane and recalculate the opening ratio to 11.45%, which means that the number of openings on the backplane is reduced. Rate

[0005] Because the size of the PCIe disk interface is larger than that of the SAS disk interface, it needs to occupy more space on the backplane. After optimizing the layout of the existing backplane, the PCIe SSD disk backplane can only open a maximum of 12 holes using the original scheme. %, at the cost of sacrificing the stacking of the backplane, and this opening ratio, after thermal design evaluation, cannot meet the thermal design requirements of 25W PCIe SSD disks

[0006] The main defects of the above existing technologies are: firstly, the existing hardware backplane opening scheme cannot meet the heat dissipation requirements of 25W or higher power PCIe SSD disks, and the bottleneck lies in the opening ratio of the backplane; using the existing backplane scheme, Since increasing the opening needs to take up space on the backplane, it will inevitably increase the difficulty of wiring, which will increase the stacking of the backplane and increase the cost of the backplane. Moreover, high-speed signals need to be routed on the backplane, and the requirements for board materials will be relatively high.

Images