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Semiconductor devices and methods with internal wafer lacked buffer

A buffer and semiconductor technology, applied in semiconductor/solid-state device manufacturing, transportation and packaging, electrical components, etc., can solve problems such as prolonging wafer loading process time and reducing production volume

Active Publication Date: 2017-05-10
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Extended wafer loading process time and reduced throughput

Method used

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  • Semiconductor devices and methods with internal wafer lacked buffer
  • Semiconductor devices and methods with internal wafer lacked buffer
  • Semiconductor devices and methods with internal wafer lacked buffer

Examples

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Embodiment Construction

[0031] Generally, the present invention relates to bonding systems for wafer bonding and methods of utilizing the same. It is to be understood, however, that the following summary provides many different embodiments, or examples, for implementing the various components of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are merely examples and not limiting.

[0032] refer to figure 1 , shows a schematic top view of a processing apparatus 100 integrated with an internal wafer carrier buffer zone constructed in accordance with aspects of the present invention in one embodiment. figure 2 is a schematic illustration of an embodiment of an internal wafer carrier buffer zone of a processing apparatus constructed in accordance with aspects of the present invention. The processing apparatus 100 is configured and designed to implement a semiconductor manufacturing process (or semiconductor proc...

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Abstract

The present invention provides an embodiment of a semiconductor processing device. The semiconductor processing apparatus includes: a load lock designed to receive a wafer carrier; an inner wafer carrier buffer configured to hold a wafer carrier received from the load lock and perform a nitrogen purge of the wafer carrier; Wafers from the wafer carrier implement the processing modules of the semiconductor process. The present invention also provides a semiconductor device and method having an inner wafer carrier buffer zone.

Description

technical field [0001] The present invention relates to the field of semiconductors, and more particularly, the present invention relates to a semiconductor device and method with an inner wafer carrier buffer zone. Background technique [0002] In semiconductor technology, semiconductor wafers are processed through various manufacturing steps to form integrated circuits defined in multiple chips. These fabrication steps include photolithographic patterning, etching, ion implantation, deposition, oxidation and thermal annealing. For example, a thermal oxidation process may be performed on the wafer to form an oxide layer, such as a silicon oxide layer. In advanced technology, the furnace tool includes a space to hold the wafer carrier and another space for nitrogen purge before oxidation. However, the loading process used to send the wafers to the oxidation boat has quality issues due to the Q time factor. Specifically, a nitrogen purge is performed prior to wafer loading...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/67H01L21/677
CPCH01L21/67017H01L21/67028H01L21/67201H01L21/6719H01L21/67389H01L21/67763
Inventor 沈宪聪黄文郁柯力仁沈香吟
Owner TAIWAN SEMICON MFG CO LTD