Input stage ESD protection circuit

Abstract

The invention discloses an input stage ESD protection circuit and relates to the technical field of integrated circuit electrostatic discharging protection design under the deep submicron technology. The input stage ESD protection circuit comprises a diode string, a power clamp ESD protection circuit, an ESD amplitude feature detection module and a transmission gate module. The input stage ESD protection circuit can effectively cut the electric connection relation between an input stage gate oxide layer and an input pressure welding spot under forward-direction ESD impact on the ground from the input pressure welding spot, so that the input stage gate oxide layer is prevented from being penetrated by overvoltage brought by ESD events, and meanwhile, in normal data transmission, it is guaranteed that signals basically have no attenuation.

Description

technical field [0001] The invention relates to the technical field of electrostatic discharge under deep submicron technology, and more specifically relates to an input-level ESD protection circuit. Background technique [0002] With the continuous advancement of integrated circuit process technology nodes, the design of chip electrostatic discharge protection is becoming more and more difficult. Technological progress has made the gate oxide layer of semiconductor electronic devices thinner, the PN junction has become shallower, and the channel has become shorter. These characteristics have greatly weakened the ability of semiconductor electronic devices to resist ESD shocks. Therefore, under the deep submicron process, the ESD protection of integrated circuits is a thorny problem that must be solved. [0003] The on-chip ESD protection circuits of integrated circuits can be divided into three categories, which are: input stage ESD protection circuits, output stage ESD pr...

AI Technical Summary

Problems solved by technology

Under the positive impact of the pad to the ground, the conduction path of the ESD charge is through the forward conduction diode D 1 and D 2 And the triggered power supply clamp ESD protection circuit is discharged to the ground from the pressure pad, because in this impact mode, the current flows through the most circuit components, and the clamping voltage is the largest on the pressure pad, which is most likely to cause input level gate oxide breakdown

In the deep submicron process, the design window between the clamp voltage formed by the protection element and the breakdown voltage of the gate oxide layer becomes smaller and smaller, and the traditional input stage ESD protection circuit cannot effectively prevent the input stage inverter from Breakdown of the gate oxide

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