Memory system structure based on phase change memorizers and loss balancing algorithm of memory system structure
A technology of phase change memory and storage system, which is applied in the field of storage system structure and loss leveling algorithm based on phase change memory, which can solve the problems of asymmetric write speed and achieve the effect of solving the huge difference in performance
Patent Information
- Authority / Receiving Office
- CN · China
- Current Assignee / Owner
- Publication Date
- 2014-06-25
- Estimated Expiration
- Not applicable · inactive patent
Smart Images
Figure 1 Figure 2 Figure 3
Abstract
Description
technical field
[0001] The invention relates to a storage system structure of an internal and external memory storage unit based on a phase change memory (Phase Change Memory, PCM) and a loss leveling algorithm thereof. Background technique
[0002] Computer storage system includes internal memory and external storage. There is a huge difference in speed and energy consumption between traditional memory (DRAM) and external memory (hard disk), such as figure 1 shown.
[0003] Compared with DRAM, phase change memory PCM is non-volatile and does not need to be refreshed; DRAM requires a large space in hardware, and it cannot be reduced to 20 nanometers or more. It can be realized on a small chip, and phase change memory can even be realized on a chip of 5 nanometers. Therefore, the phase change memory PCM with strong plasticity becomes a very attractive memory to replace the dynamic random access memory DRAM.
[0004] However, the use of PCM has the following problems: 1. T...
Examples
Embodiment Construction
[0043] Below in conjunction with accompanying drawing and embodiment the present invention will be further described:
[0044] figure 2 Shown is a schematic diagram of the data storage path of the storage system structure based on the phase change memory of the present invention, and the phase change memory PCM13 is used to replace the DRAM and the hard disk to achieve the internal and external memory storage unit. In the PCM13 main memory part, due to the write delay and write times limit of PCM13, a small piece of DRAM12 is still used as a cache; an internal and external memory controller is used to effectively manage PCM13 to avoid unbalanced writes that cause PCM unit damage. This method unifies the separate internal memory and external storage in the traditional computer storage architecture, and the internal memory and external storage are controlled by the same controller, which can be applied to the storage system of any computer or embedded system.
[0045] Such as ...