Semiconductor device

Abstract

The present invention provides a semiconductor device capable of suppressing the occurrence of latch-up effect with a small area. In the minority carrier trapping region, a P-type diffusion region (22), an N-type well (24) and a P-type diffusion region (25) are formed on the surface of a P-type semiconductor substrate (27). The N-type diffusion region (23) is formed on the surface of the N-type well (24). At this time, the N-type well (24) is sandwiched between the P-type diffusion region (22) and the P-type diffusion region (25). The P-type diffusion region ( 22 ) and the P-type diffusion region ( 25 ) are not connected by the shortest distance, but are connected by metal film wiring arranged in a detour, and both are connected to the ground pad ( 12 ).

Description

technical field [0001] The present invention relates to semiconductor devices. More specifically, it relates to a semiconductor device capable of suppressing the occurrence of latch-up. Background technique [0002] First, a conventional semiconductor device will be described. Figure 5 It is a sectional view showing a conventional semiconductor device. [0003] When a surge with a negative voltage is applied to the input pad 71, electrons as minority carriers in the P-type semiconductor substrate 87 sometimes leak from the N-type diffusion region 81 in the ESD protection circuit region to the P-type semiconductor substrate 87 . The minority carriers flow from the semiconductor substrate 87 into the P-type diffusion region 82 connected to the ground pad 72 to be absorbed. Here, the length of the P-type diffusion region 82 in the horizontal direction in the direction from the ESD protection circuit toward the internal circuit is long enough so that minority carriers are su...

AI Technical Summary

Problems solved by technology

[0005] However, in the technology disclosed in Patent Document 1, the P-type diffusion region 82 in the direction from the ESD protection circuit toward the internal circuit is long in the horizontal direction, and accordingly, the area of ​​the semiconductor device increases.

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