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Method and apparatus for performing speculative decision feedback equalization

An equalization and equalizer technology, applied in equalizers, channel distribution devices, digital transmission systems, etc., can solve the problems of limited speed, complexity, power consumption and area utilization of DFE loop 107

Active Publication Date: 2017-06-13
TEXAS INSTR INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The problem with this configuration is that the speed of the DFE loop 107 is limited by the ability to compute the ISI expression of equation (2) in one symbol period
However, there are some issues with this speculative DFE configuration, namely complexity, power consumption, and area usage, due in large part to the number of comparators

Method used

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  • Method and apparatus for performing speculative decision feedback equalization
  • Method and apparatus for performing speculative decision feedback equalization
  • Method and apparatus for performing speculative decision feedback equalization

Examples

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Embodiment Construction

[0034] Referring back to Figure 4, as an example, there are multiple overlapping levels, so it is possible to eliminate redundancy or degradation.

[0035] An example SerDes link 300 according to the present invention is in Figure 5 shown in . For simplicity, the SerDes link 300 adopts the NRZ encoding scheme, but the same configuration can be applied to other schemes, such as M-PAM. For SerDes link 300, equalizer 304 (which is typically an analog equalizer) and transmit filter 302 (which is typically a FIR filter) are embedded in receiver 303 and transmitter 301, respectively. Equalizer 304 and filter 302 can force (at least some) post-mark taps to be equal to each other. For example, if the DFE loops 303 have 1 =h 2 = 2 taps of h) (ie, h 1 and h 2 ), allowing equations (3) to (6) to become 2h, 0, 0 and -2h. In practice, by doing this, the number of comparators for an M-PAM with N taps (for example) utilizes SerDes links 200 from M N decrease to:

[0036] (7)[N*(M-1)+1...

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Abstract

Methods and apparatus are provided for equalizing received signals. A signal is filtered and transmitted over a channel (400) using a coding scheme with transmit symbols. The example SerDes (serial deserializer) link 300 employs a non-return-to-zero (NRZ) encoding scheme. The transmitted signal is shaped such that the transmit filter (302) (eg, a FIR filter) and equalizer (304) adjust a set of taps in an equalization window such that taps from the set are substantially equal to each other. Inter-symbol interference is then compensated in the equalized signal using a speculative digital front-end (DFE) circuit (305) with significantly reduced comparator levels.

Description

technical field [0001] The present invention relates generally to equalization, and more particularly to decision feedback equalizers (DFEs). Background technique [0002] Turning to FIG. 1 , a conventional serializer / deserializer (SerDes) link 100 can be seen. In operation, serializer 101 is capable of generating a serialized signal for transmission across channel 104 using transmitter 103 (which may include buffer 102). As the signal x[n] is transmitted across the channel 104, a coding scheme (with transmit symbols) is employed. An example of a coding scheme is a 2-level pulse amplitude modulation (2-PAM) scheme (which is known as non-return-to-zero or NRZ). For the NRZ scheme, the transmitter symbols are -1 and +1. The transmitted signal y[t] is received by the receiver 105 . However, this signal is usually distorted by inter-symbol interference (ISI), so after the signal is digitized by an analog-to-digital converter (ADC) 106 , the DFE loop 107 can compensate for th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L27/01
CPCH04L25/03057H04L25/03343H04L25/14H04L27/01H04L2025/0349
Inventor N·C·瓦瑞克R·F·帕亚讷
Owner TEXAS INSTR INC