Method for stabilizing MIM capacitance photoetching line widths

Abstract

The invention discloses a method for stabilizing MIM capacitance photoetching line widths. The method comprises the following steps that a semiconductor structure which comprises a blocking layer, an MIM lower polar plate layer, an MIM medium layer and an MIM upper polar plate layer from bottom to top in sequence is provided; a silicon nitride layer is arranged on the upper surface of the semiconductor structure; an oxidation layer is arranged on the upper surface of the silicon nitride layer; photoresist is arranged on the upper surface of the oxidation layer, and a photoetching technology for MIM upper electrode etching is carried out; and the silicon nitride layer and a monox layer are formed in situ in the same technology chamber. The step of O2 treatment is added in a silicon nitride thin-film deposition technology, O2 can react with Si atoms on a silicon nitride surface under energy of plasma, a thin silicon dioxide layer is arranged on the surface of a silicon nitride thin film in a covering mode, accordingly, the nitrogen content on the surface of the silicon nitride thin film is lowered or removed, the purpose of prevention of the reaction of nitrogen and photoresist is achieved, and the problem that the photoetching line widths of the MIM capacitance upper polar plate and the MIM capacitance lower polar plate are not stable is solved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for stabilizing the line width of MIM capacitance lithography. Background technique [0002] The existing MIM capacitor process usually has two steps of lithography: upper plate lithography and lower plate lithography, figure 1 It is a schematic diagram of the device structure before the photolithography process of the upper electrode of the MIM capacitor in the prior art; figure 2 It is a schematic diagram of the device structure before the photolithography process of the lower electrode of the MIM capacitor in the prior art. Such as figure 1 As shown, before the photolithography process for etching the upper electrode of the MIM capacitor, the semiconductor structure includes from bottom to top: barrier layer 1, MIM lower plate layer 2, MIM dielectric layer 3, MIM upper plate layer 4, nitrogen Silicon nitride layer 5, and photoresist 7 prepared ...

AI Technical Summary

Problems solved by technology

[0005] In view of this, the present invention proposes a method for stabilizing the line width of MIM capacitive lithography to solve the problem of unstable line width control caused by the extension of waiting time.

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