Memory error avoidance method combining software and hardware and device thereof

Abstract

The invention relates to a memory error avoidance method combining software and hardware and a device of the memory error avoidance method. The memory error avoidance method comprises the steps that the mode of combination between an SMBIST and an HMBIST is adopted, if it is the set time late at night and an apparatus is in the non-busy state, the HMBIST is activated to run, and an external timer is shut down; after an HMBIST module starts to run, a CPU of the apparatus enters the sleep mode, the HMBIST module takes over control over an RAM, and whether faults are found or not during memory detection is judged; an SMBIST module calculates the initial address and the size of a memory needing testing according to the current period number, starts to detect the memory, and judges whether faults are found or not during memory detection. The device comprises a master processor module, a CPLD module and a memory module, wherein the master processor module is connected with the CPLD module, and the memory module is connected with the CPLD module. Compared with the prior art, the memory error avoidance method combining the software and the hardware and the device of the memory error avoidance method have the advantages that the design difficulty is reduced, the memory fault detection coverage rate is high, the detection speed is high, the hardware overheads are low, reusability is good, and the cost is low.

Description

technical field [0001] The invention relates to a memory error avoidance method, in particular to a memory error avoidance method combined with hardware and software and a device thereof. Background technique [0002] At present, in the rail transit industry, various control systems and equipment have complex functions, strong real-time performance, and high safety requirements. Any error or failure of any part of the system may lead to catastrophic consequences. The memory modules of these security devices may experience systemic memory failures and random hardware failures, resulting in abnormalities in the data stored in the memory, resulting in errors in the results of any logical operations running in the memory, and ultimately affecting the security of the entire system. Therefore, it is more and more important to carry out built-in tests on the memory of rail safety equipment to achieve the purpose of memory error avoidance. [0003] At present, there are two main me...

AI Technical Summary

Problems solved by technology

[0004] 1. The pure software MBIST solution depends on the computing power of the computer, and the memory detection speed is low;

[0005] 2. The pure software MBIST solution is limited by system characteristics. Under the normal operation of the software, all memory faults cannot be detected, and the coverage of memory fault detection is low;

[0006] 3. The pure hardware MBIST solution needs to design a sp

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