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Method for communication between FFT coprocessor and main processor

A technology of co-processor and main processor, which is applied in electrical digital data processing, instruments, computers, etc., and can solve the problems of occupying CPU resources, low efficiency, high power, etc.

Inactive Publication Date: 2014-08-20
STATE GRID CORP OF CHINA +2
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

A dedicated ordinary CPU (processor) can also realize the FFT function through software configuration, but because ordinary processors do not have bus structures and arithmetic units optimized for complex operations like DSP, when using ordinary processors for FFT operations, A large number of multiplication and addition operations of FFT will greatly occupy CPU resources, resulting in high power and low efficiency.

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  • Method for communication between FFT coprocessor and main processor

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Embodiment 1

[0041] The frequency of the power grid is very low (50Hz or 60Hz), and the harmonic analysis of the power grid generally requires about 50 to 100 harmonics. To obtain higher frequency domain resolution and higher precision, the storage space required by the FFT output signal is about 10-20k. For example, when the power grid frequency is 50Hz, it is required to be able to analyze the 100th harmonic, and the signal bandwidth is at least 5000. For the convenience of implementation, 256 sampling points per cycle are taken, and the Nyquist sampling rate is 12.8k. Generally, the method of interpolation filtering FFT is used to achieve higher analysis accuracy at a lower number of FFT analysis points. This application does 4096-point FFT analysis, the output signal is a complex number, and the bit width is 24 bits, so the total storage space required is 4k*2*24 / 8=24kB. Therefore, each FFT analysis will generate 24kB of data.

[0042] refer to figure 1, when the FFT coprocessor com...

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Abstract

The invention provides a method for communication between an FFT coprocessor and a main processor. The method comprises the steps that a CPU and a DMA controller are connected to an AHB provided with an AHB-APB bridge; the AHB-APB bridge and an APB controller are integrated through the DMA controller; an APB slave controller is integrated through the FFT coprocessor; an APB arbiter is arranged at the position where the AHB is connected with an APB; the FFT coprocessor sends out an interrupt request; the CPU responds to the interrupt request, the DMA controller is configured, and the control right of the APB is given to the DMA controller; the DMA controller transfers the FFT arithmetic result to a system memory; communication is ended. According to the method for communication between the FFT coprocessor and the main processor, the problem of data exchange of the low-speed FFT coprocessor and the main processor is solved; according to the characteristics of data needing to be transmitted by the FFT coprocessor, the DMA is adopted to conduct data exchange between the FFT coprocessor and the main processor, and the utilization rate of the CPU and the buses is improved.

Description

technical field [0001] The invention relates to a communication method in the field of integrated circuits, in particular to a communication method between an FFT coprocessor and a main processor. Background technique [0002] Fourier transform is the most commonly used analysis method for frequency domain analysis of signals to obtain signal frequency domain characteristics. The proposal of discrete Fourier transform provides a theoretical basis for frequency domain analysis of digital signals. However, the direct discrete Fourier transform has a very high amount of computation, and it was not widely used before the FFT (Fast Fourier Transform) was proposed. The introduction of FFT greatly reduces the computational load of Fourier transform, making it possible for Fourier transform to be applied to real-time systems. At this time, Fourier analysis of signals began to be widely used. [0003] FFT can be realized by general-purpose DSP (Digital Signal Processor), FPGA (Fiel...

Claims

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Application Information

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IPC IPC(8): G06F15/163
Inventor 骆树萌袁玉湘于坤山姜学平
Owner STATE GRID CORP OF CHINA