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Stacked semiconductor structure and method of forming the same

A semiconductor, stacked technology, used in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as difficulty in manufacturing stacked semiconductor devices

Active Publication Date: 2017-06-13
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, it is difficult to fabricate stacked semiconductor devices with multiple functions due to integration issues of different circuit fabrication technologies

Method used

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  • Stacked semiconductor structure and method of forming the same
  • Stacked semiconductor structure and method of forming the same
  • Stacked semiconductor structure and method of forming the same

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Embodiment Construction

[0035] The making and using of exemplary embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative and do not limit the scope of the invention. In addition, terms of spatial relative position, such as "top", "before", "below", "after", are used to provide a relative relationship between parts and are not intended to imply any absolute orientation . Various features are arbitrarily drawn in different scales for simplicity and clarity.

[0036] According to one or more embodiments of the present invention, a stacked semiconductor structure includes microelectromechanical systems (MEMS) devices and complementary metal oxide semiconductor (CMOS) devices. MEMS devices include motion sensors (e.g., gyroscopes or accelerometers), RF MEMS devices (e.g., RF switches, resonato...

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Abstract

The invention provides a stacked semiconductor structure and a forming method thereof. The stacked semiconductor structure includes a first substrate. A multilayer interconnect is disposed over the first substrate. The metal portion is disposed over the multilayer interconnect. The first engaging part is located above the metal part. The second substrate has a front side. The cavity extends from the front side to a depth D in the second substrate. An active structure is disposed over the front surface of the second substrate and suspended over the cavity. The active structure includes a dielectric film, a metal unit over the dielectric film, and an overlying dielectric layer over the metal unit. The second bonding feature is over the capping dielectric layer and bonded to the first bonding feature. The second bonding feature extends through the capping dielectric layer and is electrically connected to the metal unit.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to US Provisional Application No. 61 / 799,992, filed March 13, 2013, entitled "Stacked Semiconductor Structure and Method of Forming the Same," the contents of which are incorporated herein by reference. [0003] This application is related to commonly assigned U.S. Patent Application No. _ (Attorney Docket: TSM2013-0064), entitled "Stacked Semiconductor Structure and Method of Forming the Same," filed on the same date, the contents of which are incorporated herein by reference. technical field [0004] The present invention relates generally to stacked semiconductor structures, and more particularly, to stacked semiconductor structures including microelectromechanical systems (MEMS) devices and complementary metal oxide semiconductor (CMOS) devices and methods of forming stacked semiconductor structures. Background technique [0005] Micro-Electro-Mechanical Systems (MEMS) devices A tec...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/488H01L21/60B81B7/00B81C1/00
CPCB81C1/00238B81B2201/018B81C2203/0792B81C2203/0118H01H59/0009
Inventor 朱家骅郑钧文
Owner TAIWAN SEMICON MFG CO LTD