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Overvoltage Protection Circuit

A technology for protecting circuits, overvoltage, applied in the direction of protection reacting to overvoltage, emergency protection circuit devices, emergency protection circuit devices for limiting overcurrent/overvoltage, etc.

Active Publication Date: 2017-08-15
INT BUSINESS MASCH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, such 1.8V devices are generally not suitable for use with the 3.3V circuits used in USB2.0

Method used

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Embodiment Construction

[0014] The present invention relates to integrated circuits, and more particularly, to overvoltage protection circuits. According to aspects of the present invention, there is an overvoltage protection circuit for a USB transceiver having a nominal voltage constructed using field effect transistors (FETs) having a nominal voltage less than the upper limit of the USB nominal voltage protect the circuit. In an embodiment, the USB transceiver has a nominal voltage range of 3.3V, and the overvoltage protection circuit includes stacked 1.8V transistors. In an implementation, the protection circuit includes a plurality of 1.8V NFETs connected in series as a pull-up circuit between the pad and the rail voltage and a plurality of 1.8V PFETs connected in series as a pull-down circuit between the pad and ground.

[0015] According to aspects of the invention, under an overvoltage condition, the total voltage between the pad and ground is substantially equally divided among the pluralit...

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PUM

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Abstract

The present invention relates to an overvoltage protection circuit. Provides Universal Serial Bus (USB) protection circuitry. A circuit includes: a plurality of first transistors connected in series between a pad and ground. The circuit also includes a plurality of second transistors connected in series between the pads and the supply voltage. The circuit also includes a control circuit that applies a corresponding bias voltage to each of the plurality of first transistors and each of the plurality of second transistors. The bias voltage is configured to turn off the plurality of first transistors and turn off the plurality of second transistors when the pad voltage of the pad is within a nominal voltage range; when the pad voltage increases above When the nominal voltage range, the plurality of first transistors are sequentially turned on; and when the pad voltage decreases below the nominal voltage range, the plurality of second transistors are sequentially turned on.

Description

technical field [0001] The present invention relates to integrated circuits, and more particularly, to overvoltage protection circuits. Background technique [0002] The Universal Serial Bus (USB) 3.0 interface requires backward compatibility with USB2. On the other hand, USB2.0 I / O is designed using 3.3V signaling. On the other hand, USB3.0 is low voltage differential using separate pins. As complementary metal-oxide-semiconductor (CMOS) technology evolves toward smaller devices, 3.3V device support is becoming more difficult to achieve and adding processing steps and costs for all technologies below 32nm. From a system-on-chip perspective, more of the hub-type chip functionality is moving to the mainline processor or node-hub chips of faster technology. Therefore, it is necessary to integrate USB2.0 and USB3.0 into the bare chip (die). [0003] Advanced technologies are tuned for logic performance and often provide second thick oxide devices for other applications. As...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02H7/20H02H9/04
CPCG06F13/4072G06F2213/0042H03K17/0822H03K17/687H03K17/04H02H3/20H05K3/303H05K3/32
Inventor D·M·德勒普斯
Owner INT BUSINESS MASCH CORP