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LPC bus detection system and method

A detection system and detection method technology, applied in error detection/correction, detection of faulty computer hardware, instruments, etc., can solve problems such as limited RAM resources, inability to detect LPC bus, etc., and achieve the effect of saving distributed RAM resources

Inactive Publication Date: 2014-10-29
HONG FU JIN PRECISION IND (SHENZHEN) CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Yet, the RAM resource of described programmable design is very limited, can't meet the needs of detecting LPC bus sometimes

Method used

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  • LPC bus detection system and method
  • LPC bus detection system and method
  • LPC bus detection system and method

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Embodiment Construction

[0021] see figure 1 and figure 2 , in a preferred embodiment of the present invention, a kind of LPC bus detection system comprises a CPU 10, a north bridge chip 20, a graphics card 30, a south bridge chip 40, an I / O chip 50, a programmable logic Device 60. In one embodiment, the CPU 10 , north bridge chip 20 , graphics card 30 , south bridge chip 40 , I / O chip 50 , and programmable logic device 60 are all installed on a motherboard of a server.

[0022] Described north bridge chip 20 is connected with described north bridge chip 20 by a FSB (Front Side Bus, Front Side Bus) bus, and described north bridge chip 20 is connected with described graphics card 30 by a PCI bus, and described north bridge chip 20 is also connected by a DMI A (Direct Media Interface, direct media interface) bus is connected to the south bridge chip 40 . The south bridge chip 40 is connected to the I / O chip 50 through an LPC bus, and the I / O chip 50 is used to connect low-speed devices such as a key...

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Abstract

A LPC bus detecting system includes a PLD for detecting a LPC bus of a server. The PLD includes a detecting module connected to the LPC bus and an Embedded Block RAM (EBR) connected to the detecting module. The detecting module is capable of decoding signals transferred by the LPC bus and storing decoded data to the EBR. The present disclosure further discloses a method for detecting the LPC bus.

Description

technical field [0001] The invention relates to an LPC (Low Pin Count, low pin count interface specification) bus detection system and method. Background technique [0002] A traditional server mainboard is equipped with a programmable logic device, which is connected to the LPC bus on the mainboard and used to detect signals transmitted on the LPC bus. The traditional LPC bus detection system and method is to use the decentralized programmable RAM (Random Access Memory) resource of the programmable logic device to decode the signal on the LPC bus and store it in the distributed programmable RAM. programmed in RAM. However, the RAM resources of the programmable design are very limited, which sometimes cannot meet the needs of detecting the LPC bus. Contents of the invention [0003] In view of the above, it is necessary to provide an LPC bus detection system and method capable of saving programmable design logic resources. [0004] A kind of LPC bus detection system, co...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22
CPCG06F11/0787G06F13/385
Inventor 喻明
Owner HONG FU JIN PRECISION IND (SHENZHEN) CO LTD