Digital-oscilloscope serial-bus I<2>C triggering method
A digital oscilloscope and serial bus technology, applied in the direction of digital variable display, etc., to achieve high trigger precision and accuracy, and high utilization of the whole machine
Inactive Publication Date: 2014-11-05
THE 41ST INST OF CHINA ELECTRONICS TECH GRP
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[0005] The purpose of this invention is to provide a kind of digital oscilloscope serial bus I 2 C trigger method to resolve when using I 2 The problems encountered in C communication can be widely used in various types of digital oscilloscopes
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[0020] In the present invention, the serial bus I of the digital oscilloscope 2 C trigger, including trigger synchronous comparator, trigger source selection, I 2 C asynchronous trigger, trigger holdoff, synchronous trigger, double slope extension, interpolation counting, characterized in that: according to the conditions set by the user, the I 2 C bus, I 2 The C asynchronous trigger part generates an asynchronous trigger enabling signal.
[0021] Digital oscilloscope serial bus I of the present invention 2 C trigger, can be in I 2 C's start, stop, restart, lost acknowledgment, E 2 Trigger on the position of PROM read data, 7bit address read and write data, and 10bit address read and write data.
[0022] Digital oscilloscope serial bus I of the present invention 2 C trigger, for realizing digital oscilloscope in I 2 Trigger on the start, stop and restart positions of C. In FPGA design, add the data line SDA to a state register.
[0023] Digital oscilloscope serial bus ...
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The invention discloses a digital-oscilloscope serial-bus I<2>C triggering method which includes triggering of a synchronous comparator, triggering of source election, I<2>C asynchronous triggering, triggering hold-off, synchronous triggering, dual-slope expansion, and interpolation counting. An I<2>C asynchronous triggering method includes start, stop, resetting, loss confirmation, E<2>PROM read data, 7bit addressing read-write data and 10bit addressing read-write data. Compared with the prior art, the method has obvious advantages of having rich triggering methods and multiple kinds of functions and being capable of carrying out operations of channel selection, polarity selection, qualifier selection, and address and data value setting and the like; and the method is realized in an FPGA so that a hardware circuit part is saved and the whole machine is high in utilization rate and extremely high in triggering precision and accuracy and according to set conditions, the format of an I<2>C protocol and the positions of trigger points are displayed in the format of pictures in a simple and clear manner.
Description
technical field [0001] The present invention relates to the field of digital oscilloscope trigger method, in particular to a digital oscilloscope serial bus I 2 C trigger method. Background technique [0002] Existing digital oscilloscope trigger types mainly include edge, pulse width, TV and power trigger, etc. These trigger types can meet most applications, but in some specific fields, such as serial bus, these trigger types can no longer meet the requirements, e.g. for serial bus I 2 C, has been widely used in R&D and design, and can be seen almost everywhere. The application of the serial bus trigger method on the digital oscilloscope will bring great convenience to the research and development workers. [0003] Document 1: Invention patent, CN1710429A, Dai Ge, a finite state machine-based oscilloscope condition trigger method, 2005.12.21, proposed a finite state machine-based trigger method, the system provides users with four conditions: automatic, edge , timeout, ...
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Inventor 彭海军栗永强张永坡戚瑞民
Owner THE 41ST INST OF CHINA ELECTRONICS TECH GRP