Unlock instant, AI-driven research and patent intelligence for your innovation.

Sonos flash memory device and compiling method thereof

A technology of a flash memory device and a compilation method, applied in the field of memory, can solve the problems of high current power consumption, low channel hot electron injection efficiency, etc., reduce current power consumption, improve channel hot electron injection efficiency, and solve current power consumption. big effect

Active Publication Date: 2020-02-21
SHANGHAI HUALI MICROELECTRONICS CORP
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As a compromise solution, the SONOS flash memory device with CHEI as the compilation mechanism must apply a high voltage to both the drain and the gate, but this also leads to low channel hot electron injection efficiency and high current consumption.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Sonos flash memory device and compiling method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be further described below in conjunction with the accompanying drawings of the specification. Of course, the present invention is not limited to this specific embodiment, and general replacements well known to those skilled in the art are also covered by the protection scope of the present invention.

[0020] figure 1 Shown is a schematic structural diagram of a SONOS flash memory device according to an embodiment of the present invention, such as figure 1 As shown, the SONOS flash memory device is an n-channel device, and includes a p-type semiconductor substrate 10, an n-type doped source region 15a and a drain region 15b in the p-type semiconductor substrate 10, and a source and drain region on the semiconductor substrate. Split gate structure between regions. The split gate structure includes a first oxide layer 11 in contact with the semic...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
Login to View More

Abstract

The invention discloses an SONOS flash memory device which comprises a substrate and a split grid structure located on the substrate. The split grid structure comprises a first oxidation layer, a polycrystalline silicon control grid, a silicon nitride grid and a second oxidation layer, wherein the first oxidation layer makes contact with the semiconductor substrate, the polycrystalline silicon control grid and the silicon nitride grid are located on the first oxidation layer, and the second oxidation layer isolates the polycrystalline silicon control grid from the silicon nitride grid. When the SONOS flash memory device is used for compiling, a first grid voltage higher than or equal to a threshold voltage is applied to the polycrystalline silicon control grid, a second grid voltage higher than the first grid voltage is applied to the silicon nitride grid, and a positive substrate bias voltage is applied to the semiconductor substrate, so that electrons of a channel electron layer induced in the position, below the polycrystalline silicon control grid, of the semiconductor substrate under the action of the first grid voltage are accelerated under the action of the substrate bias voltage and injected into the silicon nitride grid under the action of the second grid voltage. Thus, channel hot electron injection efficiency can be improved, current power consumption is reduced, and the size of the device is reduced.

Description

Technical field [0001] The invention relates to a memory, in particular to a SONOS flash memory device and a compilation method thereof. Background technique [0002] With the SONOS (Silicon-Oxide-Nitride-Oxide-Silicon, silicon-oxide-nitride-oxide-silicon) structure gradually replacing the polysilicon floating gate flash memory structure as the main flash memory storage structure for nonvolatile memory, about How to improve the compilation speed of SONOS structure is increasing. [0003] One of the main compilation mechanisms used in SONOS flash memory devices is the channel hot electron (CHE) injection effect. Channel hot electron injection is considered to be quite reliable even after long-term cycles, because it does not impose great stress on the tunnel oxide layer. But the disadvantage of CHE lies in the low injection efficiency of compilation. This is because the direction of the electric field of the channel at the injection point close to the drain end is not conducive t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/115H01L29/792H01L21/336H01L21/28
Inventor 顾经纶
Owner SHANGHAI HUALI MICROELECTRONICS CORP