A Realization Method of Parallelized Matrix Inversion Hardware Device
An implementation method and matrix inversion technology, applied in the field of signal processing, can solve problems such as increased computational complexity, increased difficulty in algorithm design hardware implementation, complex design of the receiving end, etc., and achieve the effect of improving the implementation speed
Active Publication Date: 2017-07-25
南京易太可通信技术有限公司
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[0003] MIMO communication system, the design at the receiving end is quite complicated
Channel estimation at the receiving end will involve a large number of matrix inversion operations, especially as the number of transmitting antennas and receiving antennas increases, the dimension of the matrix also increases, and the computational complexity of matrix inversion will also increase greatly, resulting in matrix inversion. The difficulty of inverse algorithm design and hardware implementation has been greatly increased, which has become a technical problem to be solved urgently in the current MIMO system
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[0021] Below in conjunction with accompanying drawing and specific embodiment, further illustrate the present invention, should be understood that these embodiments are only for illustrating the present invention and are not intended to limit the scope of the present invention, after having read the present invention, those skilled in the art will understand various aspects of the present invention Equivalent transformations all fall within the scope defined by the appended claims of this application.
[0022] The invention discloses a method for realizing a parallelized matrix inversion hardware device, which is applied to channel estimation and signal equalization processing at the receiving end of a MIMO communication system. For a MIMO communication system with M transmitting antennas and N receiving antennas , the receiver signal can be expressed as r=Hs+n, where r represents the received signal, which is a column vector with dimension M; s represents the transmitted signa...
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The invention discloses a realization method of a parallelization matrix inversion hardware device. According to the method, a general framework of a pulsation array is determined according to the dimension number of an input matrix to be inverted, different types of processing units are subjected to algorithm description and function analysis, in addition, an inside structure of each processing unit is designed, and the parallelization processing on data is realized. The realization method of the parallelization matrix inversion hardware device provided by the invention has the advantages that the matrix inversion pulsation array based on improved Givens rotation is designed, the square root calculation is avoided, meanwhile, a great amount of division calculation is omitted, the algorithm complexity is reduced, hardware resources can be effectively saved, meanwhile, the whole matrix inversion process adopts the parallelization processing, and the matrix inversion hardware realization speed can be effectively accelerated. The realization method can be applied to the hardware realization of matrix inversion problems in the fields of wireless communication, signal processing, number calculation and the like.
Description
technical field [0001] The invention belongs to the field of signal processing, and in particular relates to a method for realizing a parallelized matrix inversion hardware device. Background technique [0002] With the continuous development of wireless communication technology, users have higher and higher requirements for the reliability and effectiveness of the communication system. In order to increase the transmission rate of the system and increase the spectrum efficiency of the system, the multiple input multiple output (Multiple Input Multiple Output, MIMO) technology has been extensively researched as a key technology. Wireless communication standards such as IEEE802.11n, IEEE802.11ac, IEEE 802.11ad, and 3GPP-LTE all adopt MIMO technology. [0003] The design of the MIMO communication system at the receiving end is quite complicated. Channel estimation at the receiving end will involve a large number of matrix inversion operations, especially as the number of tra...
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IPC IPC(8): G06F17/16
Inventor 何世文余登高黄永明王海明杨绿溪张军
Owner 南京易太可通信技术有限公司