Read-once and write-once storage based read-more and write more storage and implementation method thereof

Abstract

The invention discloses a read-once and write-once storage based read-more and write more storage and an implementation method thereof. The read-more and write more storage comprises n read-once write-m storage units, a state storing unit, a control logic, m writing ports and n reading ports, wherein n and m are both integer not less than 0; each read-once write-m storing unit is equipped with m read-once write-once storages; when writing through the write ports, data are synchronously written into one read-once and write-once storage of each read-once and write-m storage unit; the state storing unit is used for recording the storage state of data in each read-once and write-once storage; the control logic is used for controlling mode of the reading ports to reading data from each read-once and write-once storage according to a read address. Compared with the small-capacity nRmW storage based large-capacity nRmW storage, the read-once and write-once storage based read-more and write more storage has the advantages that the area of a chip can be greatly reduced, the power consumption of the chip is decreased, the time sequence of the chip is improved, and therefore, the overall performances are improved.

Description

technical field [0001] The invention relates to the technical field of storage in the design of switching chips, in particular to a large-capacity multi-read multi-write memory realized based on a high-density, large-capacity one-read-one-write memory and an implementation method thereof. Background technique [0002] A high-capacity read-multiple-write memory (nRmW Memory, n read m write memory, n, m is an integer greater than or equal to 0) is usually used in a high-performance switching chip, such as a two-read two-write memory 2R2W memory. [0003] At present, the solution to realize large-capacity 2R2W memory is mainly based on the splicing of small-capacity 2R2W memory. The 2R2W memory unit has the characteristics of small density, small capacity, and high power consumption. Its maximum capacity is very limited. To realize a large-capacity 2R2W memory, it needs to be spliced ​​by multiple small-capacity 2R2W. The power consumption and area of ​​this large-capacity 2R2...

AI Technical Summary

Problems solved by technology

This kind of large-capacity 2R2W memory spliced ​​based on small-capacity 2R2W memory, its power consumption and area increase linearly with the increase of memory depth and width, and a large number of traces between 2R2W memories also cause timing deterioration

[0004] Therefore, it is simple and easy to use small-capacity nRmW Memory to construct large-capacity nRmW Memory, but there are problems such as large area, high power consumption and poor timing, which cannot meet the requirements of high-performance switching chips

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