Decoding method, memory storage device and memory control circuit unit

Abstract

The invention provides a decoding method, a memory storage device and a memory control circuit unit. The decoding method comprises the following steps: reading a plurality of storage units according to first reading voltages to obtain a first verification bit; executing a decoding program containing a probability decoding algorithm according to the first verification bit to generate a plurality of first decoding bits, and judging whether decoding succeeds or not by utilizing the first decoding bits; if the decoding fails, reading the storage units according to second reading voltages to obtain a second verification bit; executing the decoding program according to the second verification bit to generate a plurality of second decoding bits, wherein the second reading voltages are different from the first reading voltages, and the number of the second reading voltages is equal to that of the first reading voltages. Thus, the error correcting capacity can be improved.

Description

technical field [0001] The present invention relates to a decoding method, and in particular to a decoding method of a rewritable non-volatile memory module, a memory storage device and a memory control circuit unit. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Since the rewritable non-volatile memory module (for example, flash memory) has the characteristics of data non-volatility, power saving, small size, and no mechanical structure, it is very suitable for being built into the various memory modules listed above. in portable multimedia devices. [0003] Generally, some error correcting code (error correcting code, ECC for short) is added to the data stored in the rewritable non-volatile memory module. In the past, error correction codes mostly used algebraic decoding algorithms, such as (BCH code), but current probabilistic decoding alg...

AI Technical Summary

Problems solved by technology

However, the distance between these effective codewords is not fixed, so the number of bits that can be corrected is not fixed

For example, in a codeword (codeword) there are 4 bits in error, and the corresponding low-density parity check code can correct these errors; but in the same codeword, if there are other 3 bits in error , the corresponding LDPC may not be able to correct these errors

In addition, using different sparse matrices, the error correction ability of the LDPC will be different

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