Decoding method, memory storage device and memory control circuit unit

Abstract

The invention provides a decoding method, a memory storage device and a memory control circuit unit. The method includes: reading a plurality of memory cells according to a first read voltage to obtain a first verification bit; performing a decoding procedure including a probabilistic decoding algorithm according to the first verification bit to generate a plurality of first decoding bits, and using the first verification bit A decoding bit determines whether the decoding is successful; and if the decoding fails, read the storage unit according to the second read voltage to obtain a second verification bit, and perform a decoding process according to the second verification bit to generate a plurality of second decoding bits. Wherein the second read voltage is different from the first read voltage, and the number of the second read voltage is the same as the number of the first read voltage. Thereby, the ability to correct errors can be improved.

Description

technical field [0001] The present invention relates to a decoding method, and in particular to a decoding method of a rewritable non-volatile memory module, a memory storage device and a memory control circuit unit. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Since the rewritable non-volatile memory module (for example, flash memory) has the characteristics of data non-volatility, power saving, small size, and no mechanical structure, it is very suitable for being built into the various memory modules listed above. in portable multimedia devices. [0003] Generally, some error correcting code (error correcting code, ECC for short) is added to the data stored in the rewritable non-volatile memory module. In the past, error correction codes mostly used algebraic decoding algorithms, such as (BCHcode), but current probabilistic decoding algo...

AI Technical Summary

Problems solved by technology

However, the distance between these effective codewords is not fixed, so the number of bits that can be corrected is not fixed

For example, in a codeword (codeword) there are 4 bits in error, and the corresponding low-density parity check code can correct these errors; but in the same codeword, if there are other 3 bits in error , the corresponding LDPC may not be able to correct these errors

In addition, using different sparse matrices, the error correction ability of the LDPC will be different

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