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Error correction method, memory controller and memory storage system

A memory controller and error correction technology, applied in static memory, instruments, etc., can solve problems such as data loss and data cannot be corrected, and achieve the effect of improving the ability of error correction

Active Publication Date: 2011-10-05
PHISON ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when the number of erroneous symbols in the data exceeds the number of erroneous symbols that can be detected and corrected by the ECC circuit, the data containing the erroneous symbols cannot be corrected, resulting in data loss

Method used

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  • Error correction method, memory controller and memory storage system
  • Error correction method, memory controller and memory storage system
  • Error correction method, memory controller and memory storage system

Examples

Experimental program
Comparison scheme
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no. 1 example

[0058] Figure 1A It is the host system using the memory storage device according to the first embodiment of the present invention.

[0059] Please refer to Figure 1A , the host system 1000 generally includes a computer 1100 and an input / output (input / output, referred to as: I / O) device 1106 . The computer 1100 includes a microprocessor 1102 , a random access memory (random access memory, RAM for short) 1104 , a system bus 1108 and a data transmission interface 1110 . The input / output device 1106 includes such as Figure 1B mouse 1202, keyboard 1204, monitor 1206 and printer 1208. It is important to understand that Figure 1B The devices shown are not limited to the input / output device 1106, which may also include other devices.

[0060] In the embodiment of the present invention, the memory storage device 100 is electrically connected with other components of the host system 1000 through the data transmission interface 1110 . Data can be written into or read from the mem...

no. 2 example

[0107] The memory storage device of the second embodiment is essentially the same as the memory storage device of the first embodiment, and only the differences are described here. The following will use the first embodiment figure 2 and image 3 The second embodiment will be described.

[0108] The memory management circuit 202 of the second embodiment will also Figure 4-11 The error correction mechanism, data access mechanism and memory management mechanism are shown to operate the memory die 106 . In this embodiment, in addition to performing the above-mentioned operation of opening the mother-child physical block and closing the operation of the mother-child physical block to write data, the memory management circuit 202 is also used to execute a random writing mode (Random Writing Mode) to write data .

[0109] Specifically, due to the programming specifications of the flash memory chip 106, it must be written from the first physical page of each physical block to t...

no. 3 example

[0128] The memory storage device of the third embodiment is essentially the same as the memory storage device of the first embodiment, and only the differences are described here. The following will use the first embodiment figure 2 and image 3 A third embodiment will be described.

[0129] The memory management circuit 202 of the third embodiment will also Figure 4-10 The data access mechanism and memory management mechanism are shown to operate the memory die 106 .

[0130] The memory chip 106 is an MLC NAND flash memory, so each memory cell can store multiple symbols. Specifically, when programming the memory cells of the SLC NAND flash memory, only a single-level program can be performed, so each memory cell can only store one symbol. The programming of the physical block of the MLC NAND flash memory can be divided into multiple stages. For example, taking a 2-layer storage unit as an example, the programming of the physical block can be divided into two stages. T...

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PUM

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Abstract

The invention relates to an error correction method, a memory controller and a memory storage system. The method is applied to a memory wafer consisting of a plurality of physical blocks. Each physical block has a plurality of physical pages, and the physical pages of each physical block can be written independently and be removed simultaneously. The method comprises a step that a plurality of data is written in physical pages of a first physical block, and a parity is generated based on the data; The method also comprises a step that the parity generated based on the data is continued to be written in a physical page of the first physical block, and data in the physical block is corrected based on the parity. Thereby, when an error check and a correcting circuit can not correct an error symbol of data, the error symbol of the data can be corrected through a stored parity. Accordingly, error correction capability can be enhanced through a technical scheme of the present invention.

Description

technical field [0001] The invention relates to an error correction method for correcting data stored in a rewritable non-volatile memory, a memory controller and a memory storage system. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Because rewritable non-volatile memory (rewritable non-volatile memory) has the characteristics of data non-volatility, power saving, small size and no mechanical structure, it is suitable for portable applications, and is most suitable for this type of portable battery. powered product. A solid state drive is a storage device that uses a rewritable non-volatile memory as a storage medium. Due to its small size and large capacity, the rewritable non-volatile memory has been widely used for storing important personal data. Therefore, the rewritable non-volatile memory industry has become a very popular part of t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/42
Inventor 朱健华
Owner PHISON ELECTRONICS
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