Access trace locality analysis-based shared buffer optimization method in multi-core environment

A shared cache and optimization method technology, applied in the direction of memory address/allocation/relocation, resource allocation, memory system, etc., can solve the problems of high overhead, insufficient dynamic behavior collection and analysis, waste of cache resources, etc., to reduce cache hotspots The probability of improving performance and the effect of improving cache performance

Inactive Publication Date: 2015-04-29
凯习(北京)信息科技有限公司
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Problems solved by technology

When allocating cache partitions, one type of method is to allocate a fixed-size cache to programs or tasks. This method ignores the phased characteristics of data locality during program execution, that is, the program’s demand for cache at different stages of execution. There may be large differences, which easily lead to waste or insufficient cache resources; another method is to dynamically adjust the cache partition according to the p

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  • Access trace locality analysis-based shared buffer optimization method in multi-core environment
  • Access trace locality analysis-based shared buffer optimization method in multi-core environment
  • Access trace locality analysis-based shared buffer optimization method in multi-core environment

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[0026] The present invention will be further described in detail below in conjunction with the accompanying drawings.

[0027] In the present invention, the program code is marked as P, and each program code P generates a task when running, and the task is marked as task. All tasks in the operating system are recorded as T={task 1 , task 2 ,...,task c}, task 1 Indicates the first task, task 2 Indicates the first task, task c Indicates the last task, c indicates the identification number of the task, for the convenience of description, task c Also means any task. The memory access trace sequence of all tasks T in the operating system is denoted as MA T = { MA task 1 , MA task 2 , . . . , MA task ...

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Abstract

The invention provides an access trace locality analysis-based shared buffer optimization method in a multi-core environment. The method relates to a technology for improving program buffer performance in the multi-core environment and reducing cache interference between tasks. An access trace sequence of a task to be operated is pre-analyzed through a locality analysis method, the stage information is marked, and dynamic distribution and adjustment are performed in the actual execution process according to the stage change of the task. A buffer distribution method is adopted in the distribution and adjustment process; the execution of other tasks cannot be affected according to distribution and adjustment of each task, and the data migration is greatly reduced. The buffer optimization method has the advantages of obvious optimization effect, flexibility in use and small extra cost.

Description

technical field [0001] The invention relates to a method for optimizing the performance of a shared cache in a multi-core architecture. More specifically, the present invention relates to a method for optimizing cache performance when multiple tasks are executed in parallel and share a cache in a multi-core architecture. Background technique [0002] In recent years, due to the limitations of the integrated circuit manufacturing process and chip power consumption, it has been impossible to improve the performance of the processor by simply increasing the main frequency. At present, it is generally believed in the academic and industrial circles that only by increasing the integration level and realizing parallelism in the processor chip can Moore's Law be extended and the performance of the processor continuously improved. Based on this consensus, relying on the progress of semiconductor and microelectronics technology, multi-core or many-core processor structure has gradua...

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Application Information

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IPC IPC(8): G06F12/08G06F9/50G06F12/084
Inventor 刘轶周彧聪冯福利
Owner 凯习(北京)信息科技有限公司
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