Automatic rapid phase calibration method for sampling clock with multiple A/D converters

Abstract

The invention discloses an automatic rapid phase calibration method for a sampling clock with multiple A / D converters. Based on the structures of multiple A / D converters, a clock phase shifting technique is adopted, so that N A / D converters perform real-time acquisition on the same input signal, then data acquired by the N A / D converters are spliced together, after the acquired data are read and separated by an upper computer, the N-path data are retrieved, so phases are obtained through performing FFT on the retrieved data, and then a phase shifter is controlled to shift the phases according to the requirements for the phases until the phases conform to accuracy requirements. After phase resolution is performed on the data which are acquired by the N converters at first time, the data are orderly rearranged according to the sizes of the phases so as to enable the actual phases of the N-path data to be closer to an ideal phase; therefore, when the phase shifter shifts the phases, because the converters are adjusted to one path which is the closest to the ideal phase, the minimum phase shift is performed by the phase shifter on the data, so that the phase shifter realizes calibration in the shortest time, the calibration time is greatly shortened, and the purpose of rapid calibration is realized.

Description

technical field [0001] The invention relates to the technical field of oscilloscopes, in particular to an automatic fast calibration method for sampling clock phases of multiple A / D converters. Background technique [0002] In the field of high-speed digital oscilloscopes, the requirements for the acquisition speed and data storage speed of the test system are relatively high. One A / D converter often cannot meet the requirements for high-speed acquisition. It is necessary to adopt a multi-ADC interleaved sampling architecture to complete high-speed data acquisition. In the case of multi-A / DC interleaved sampling to achieve a high sampling rate, the first problem is to adjust the phase of each interleaved sampling A / DC sampling clock to a specific range to achieve interleaved sampling. Therefore, in multi-ADC sampling to achieve high-speed data During acquisition, fast automatic calibration of the sampling clock phase becomes an urgent need. Contents of the invention [00...

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Problems solved by technology

[0002] In the field of high-speed digital oscilloscopes, the requirements for the acquisition speed and data storage speed of the test system are relatively high. One A / D converter often cannot meet the requirements for high-speed acquisition. It is necessary to adopt a multi-ADC interleaved sampling architecture to complete high-speed data acquisition.

In the case of multi-A / DC interleaved sampling to achieve a high sampling rate, the first problem is to adjust the phase of each interleaved sampling A / DC sampling clock to a specific range to achieve interleaved sampling. Therefore, in multi-ADC sampling to achieve high-speed data During acquisition, fast automatic calibration of the sampling clock phase becomes an urgent need

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