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Manufacturing method of semiconductor package

A packaging and semiconductor technology, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problem that the first substrate 11 and the second substrate 12 are prone to warping, cracking, and interface fractures. And other issues

Active Publication Date: 2018-01-30
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, the second substrate 12 covers the first substrate 11, so when cleaning, the flux will be cleaned from above and sideways toward the second substrate 12 and the solder balls 13 (such as Figure 1B and Figure 1B ’ shown in the direction of the arrow X, Z), so after the cleaning operation, the flux f will remain on the top of the first packaging structure 1a due to the driving of deionized water, as shown in FIG. Figure 1B As shown, when the first packaging structure 1a conducts heat conduction, a popcorn situation will occur, thus causing delamination of the stacked semiconductor package, that is, the second substrate 12 and the first packaging structure 1a separation
[0006] In addition, since the first substrate 11, the second substrate 12, and the solder balls 13 have different coefficients of thermal expansion (CTE), the first substrate 11 and the second substrate 11 will 12 is prone to warping, which causes the interface between these solder balls 13 and the first substrate 11 or the second substrate 12 to expand and contract continuously and cause breakage, thus causing a short circuit

Method used

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  • Manufacturing method of semiconductor package
  • Manufacturing method of semiconductor package
  • Manufacturing method of semiconductor package

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Embodiment Construction

[0052] The implementation of the present invention will be described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

[0053] It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present invention. Limiting conditions, so there is no technical substantive meaning, any modification of structure, change of proportional relationship or adjustment of size, without affecting the effect and purpose of the present invention, should still fall within the scope of the present invention. The disclosed technical content must be within the scope covered. At the same time, terms such as "above" and...

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PUM

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Abstract

A semiconductor package and its manufacturing method and substrate and packaging structure. The manufacturing method of the semiconductor package firstly stacks the second substrate on the first substrate by a plurality of support components, and the second substrate has at least one through The cleaning hole is used to clean the support assembly, and the space between the second substrate and the first substrate is cleaned using the cleaning hole.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor package, in particular to a method for manufacturing a semiconductor package with improved reliability. Background technique [0002] With the vigorous development of portable electronic products in recent years, all kinds of related products are gradually moving towards the trend of high density, high performance, light, thin, short and small, and various types of stack packages (package on package, PoP) are also Therefore, we cooperate with innovation in order to meet the requirements of thinness, shortness and high density. [0003] A conventional stacked semiconductor package includes two stacked first package structures and second package structures, and an encapsulant for adhering the first package structure and the second package structure. The first packaging structure includes a first substrate and a first semiconductor component electrically combined with the first substrate...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/16H01L23/28H01L23/488H01L21/56H01L21/60
CPCH01L2224/83005H01L23/13H01L21/561H01L21/563H01L21/568H01L23/562H01L24/16H01L24/32H01L24/48H01L24/73H01L24/83H01L24/85H01L24/97H01L25/0655H01L25/105H01L2224/16225H01L2224/32225H01L2224/48227H01L2224/73204H01L2224/81005H01L2224/97H01L2225/1023H01L2225/1058H01L2924/15162H01L2924/15331H01L2924/3511H01L2224/85005H01L23/49816H01L23/49833H01L2924/181H01L2924/15174H01L2924/00014H01L25/50H01L24/81Y10T428/192H01L2224/83H01L2224/81H01L2224/85H01L2924/00H01L2924/00012H01L2224/45099H01L2224/45015H01L2924/207H01L21/02057
Inventor 徐逐崎王隆源江政嘉施嘉凯
Owner SILICONWARE PRECISION IND CO LTD
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