Alignment Mark Manufacturing Method for Twice Trench Type Super Junction Device

Abstract

The invention discloses a method for manufacturing an alignment mark of a double-trench type super junction device, which comprises the following steps: Step 1, providing an epitaxial silicon wafer. Step 2: using the first photomask to simultaneously define the patterns of the first and second deep trenches located in the active area and the alignment mark area, the width of the second deep trench is greater than the width of the first deep trench. Step 3, performing etching by using a dry etching process to simultaneously form the first and second deep trenches. Step 4: Perform the first epitaxial filling to completely fill the first deep trench and form a first groove on top of the second deep trench. Step 5, performing a second epitaxial growth and forming an alignment mark consisting of grooves on the surface directly above the second deep trench. The invention can improve the alignment mark signal intensity after the double epitaxial layer and can reduce the manufacturing cost.

Description

technical field [0001] The invention relates to a manufacturing process method of a semiconductor integrated circuit, in particular to a method for manufacturing an alignment mark of a double-trench type super junction device. Background technique [0002] Twice-trench super junction devices need to use two layers of silicon epitaxial layers, and form deep trenches in the two layers of silicon epitaxial layers and fill them respectively. The deep trenches of the upper and lower silicon epitaxial layers must be aligned and filled in the upper and lower layers The epitaxial layers in the two deep trenches can be stacked to form a super junction structure in which P-type thin layers and N-type thin layers are alternately arranged. Such as Figure 1A to Figure 1D Shown is a schematic diagram of the device structure in each step of the existing two-step trench type super junction device alignment mark manufacturing method; the existing two-time trench type super junction device a...

AI Technical Summary

Problems solved by technology

[0010] In the prior art, the alignment mark formed on the surface of the first silicon epitaxial layer 101, that is, the first groove 104 needs to use a separate layer of photomask, not only the process cost is high, but also the photolithography of the first groove 104 and the first layer The problem of misalignment is easy to occur between the deep trenches 102 defined by the photomask; in addition, in the existing double-trench super junction device, the second silicon epitaxial layer 102 needs to be formed on the surface of the first silicon epitaxial layer 101. The size of the first groove 104 defined in the prior art is relatively small. After the second silicon epitaxial layer 102 is formed, the formed second groove 106 will be further reduced on the basis of the first groove 104, or even disappear, up to Less than the requirements of the alignment mark, the signal of the alignment mark in the subsequent photolithography process is weak or even impossible to achieve alignment

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