Server system and power-on operating time sequence control method thereof

Abstract

A server system and controlling method for an operation timing after being powered up are disclosed. The sever system controls a reset signal to have a voltage lower than a first voltage value by introducing a voltage monitoring module when a work power lower than a voltage threshold. On the other hand, when the work power voltage increases to higher than the voltage threshold of the voltage monitoring module, the voltage monitoring module controls the reset signal voltage to be higher than a second voltage value, whereby achieving in a technical efficacy of stable initialization and reset of the server.

Description

technical field [0001] The present invention relates to a server system and its control method, in particular to a server system and its control method for controlling the operation sequence after power-on. Background technique [0002] At present, the server contains multiple very large integrated circuits (VLSI). Among them, the reset signal of some important VLSI will affect the operation timing of the server. These important VLSI will receive the reset signal After initialization and reset, the server can start to operate normally. [0003] However, in the circuit design of the current server, some logic elements that generate the reset signal are prone to glitch when the server is first powered on. When the glitch is transmitted to the important VLSI in the server At this time, the VLSI is usually in the initialization stage just because the server has just been powered on, and it starts to reset because it mistakenly regards the surge as a reset signal. setting, thus...

AI Technical Summary

Problems solved by technology

[0003] However, in the circuit design of the current server, some logic elements that generate the reset signal are prone to glitch when the server is first powered on. When the glitch is transmitted to the important VLSI in the server At this time, the VLSI is usually in the initialization stage just because the server has just been powered on, and it starts to reset because it mistakenly regards the surge as a reset signal. setting, thus affecting the normal operation of the server

[0004] In summary, it can be seen that there has been a problem in the prior art for a long time that logic components may generate surges that may be mistaken for reset signals when the server is powered on. Therefore, it is necessary to propose improved technical means to solve this problem

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