Floating point calculation method based on FPGA

Abstract

The invention provides a floating point calculation method based on a FPGA. The method comprises the steps of processing a group of data which is identical in index and different in mantissa and used as a data block, expressing the data in calculation by adopting a fixed point format, adjusting the data precision by virtue of left shifting, right shifting the data to avoid the overflow error in the fixed point calculation, and dividing result data by a preset gain to obtain correct data after the calculation is ended. By adopting the floating point calculation method, the contradiction between a fixed point algorithm and a floating point algorithm is solved, the floating point calculation efficiency is improved, and the cost is reduced.

Description

technical field [0001] The invention relates to a programmable processor, in particular to an FPGA-based floating-point calculation method. Background technique [0002] In communication and radar signal processing, FFT is a commonly used tool, and it is mostly completed by FPGA when the speed requirement is relatively high or the integration degree is high. The vast majority of processors use fixed-point data format to process data, which makes the processing structure relatively simple, but the overflow phenomenon is more serious, and the use of simple fixed-point truncation will submerge small signals in large signals, making the result data Lose the necessary precision. As the requirements for data precision are getting higher and higher, the general fixed-point algorithm can no longer meet the high-precision requirements, and it is necessary to resort to floating-point processors for calculations to avoid overflow problems in applications. Most foreign FFT Cores use f...

AI Technical Summary

Problems solved by technology

Therefore, compared with fixed-point calculations, floating-point calculations have disadvantages such as difficult development, long development cycle,...

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