Detection method for memory cell in SRAM

A detection method and storage unit technology, applied in static memory, instruments, etc., can solve the problems of time-consuming, high cost of storage units, inaccuracy, etc., and achieve the effects of accurate results, low cost, and reduced detection volume.

Active Publication Date: 2015-06-10
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
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Problems solved by technology

[0010] The present invention solves the problem of high cost, time-consuming and inaccurate detection of memory cells in SRAM through wafer acceptability test

Method used

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  • Detection method for memory cell in SRAM
  • Detection method for memory cell in SRAM
  • Detection method for memory cell in SRAM

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Embodiment Construction

[0048] As described in the background technology, the existing method for detecting SRAM memory cells is to scan each MOS transistor in the memory cell to obtain the threshold voltage of each MOS transistor, and SRAM has a plurality of memory cells, which results in obtaining the memory cell Whether the two inverters are matched is costly and time-consuming, and sometimes the result is not accurate. In view of the above problems, the present invention proposes to perform detection in units of storage units, which reduces the amount of testing, improves efficiency, and provides more accurate results.

[0049] In order to make the above objects, features and advantages of the present invention more comprehensible, specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0050] image 3 It is a circuit diagram used in the detection method provided by an embodiment of the present invention, refer to image 3...

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Abstract

The invention provides a detection method for a memory cell in SRAM. According to the invention, the input terminal of a first inverter in the memory cell is connected with the output terminal of the first inverter and with the input terminal of a second inverter; since the input and the output of the first inverter are equal and the input and the output of the second inverter accord with the characteristic curve of the inverter, if the first inverter matches with the second inverter, the output of the first inverter is equal to the output of the second inverter under the condition that the input of the first inverter is equal to the input of the second inverter; thus, under the condition that the input of the first inverter is equal to the input of the second inverter, if the output of the first inverter is not equal to the output of the second inverter, the first inverter does not match with the second inverter and it is certain that the threshold-voltage of at least one transistor drifts. As the memory cell is used as a detection unit, individual detection of every MOS transistor in the memory cell is avoided; detection quantity of the whole SRAM is reduced; efficiency is improved; cost is low; and results are accurate.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a method for detecting a storage unit in an SRAM. Background technique [0002] With the improvement of integrated circuit integration and the reduction of power supply voltage, the geometric size of semiconductor devices constituting integrated circuits has been continuously reduced, which requires continuous improvement of chip manufacturing processes. The improvement of the manufacturing process has a great influence on the performance of a single semiconductor device. In order to evaluate the performance of the semiconductor device, it is usually necessary to test the reliability of the semiconductor device. [0003] There are a large number of memory cells composed of two inverters in SRAM (Static Random Access Memory). Each inverter includes a pair of pull-up PMOS transistors and pull-down NMOS transistors. If the two inverters do not match, the The data of the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/50
Inventor 王楠李煜王媛王颖倩
Owner SEMICON MFG INT (SHANGHAI) CORP
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