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A test method for crosstalk between memory cells in NOR flash memory

A storage unit and test method technology, applied in static memory, instruments, etc., can solve problems such as time-consuming, redundant storage array test design, and inability to simulate crosstalk between storage units, shortening test time and optimizing test design. Effect

Active Publication Date: 2017-10-17
GIGADEVICE SEMICON (BEIJING) INC
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Problems solved by technology

[0005] In view of this, the embodiment of the present invention provides a method for testing crosstalk between memory cells in NOR flash memory, which solves the problem that the test of crosstalk between storage cells in the prior art cannot simulate the operation of a storage array of NOR flash memory and Redundancy in test design and technical issues that take a lot of time in the test process

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  • A test method for crosstalk between memory cells in NOR flash memory
  • A test method for crosstalk between memory cells in NOR flash memory

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Embodiment Construction

[0042] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, only parts related to the present invention are shown in the drawings but not all content.

[0043] An embodiment of the present invention provides a method for testing crosstalk between storage units in a NOR flash memory. Wherein, the inter-memory cell crosstalk includes read crosstalk, word line crosstalk, bit line crosstalk and substrate crosstalk. figure 1 It is a flow chart of a method for testing crosstalk between memory cells in a NOR flash memory according to an embodiment of the present invention. see figure 1 , the test method includes:

[0044] Step S11, providing a test structure for a memory array of ...

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Abstract

The invention discloses a method for testing crosstalk between storage units in NOR flash memory, which includes: providing a test structure for simulating a storage array of NOR flash memory; performing programming and erasing operations on the storage units in the test structure successively, and The second storage unit and the fourth storage unit are defined as the first erasing unit and the second erasing unit; the programming operation is performed on the first storage unit and the third storage unit respectively and are defined as the first programming unit and the second programming unit unit; perform a read operation on the target memory cell, and evaluate the influence of read crosstalk on the program cell and erase unit; perform a program operation on the target memory cell, and simultaneously evaluate the word line crosstalk and bit line crosstalk on the program cell and erase unit Cell impact; pressurize the substrate of the target memory cell and evaluate the effect of substrate crosstalk on programming and erasing cells. The invention can well simulate the operation condition of the actual storage array, optimize the test design and shorten the test time.

Description

technical field [0001] The invention relates to the technical field of non-volatile memory, in particular to a method for testing crosstalk between storage units in NOR flash memory. Background technique [0002] NOR Flash is a kind of non-volatile flash memory. Its characteristic is that the application program can be run directly in the flash memory, and it is not necessary to read the code into the random access memory of the system, so that it has high transmission efficiency. Therefore, NOR Flash has been widely used. [0003] In NOR Flash, when an erase or program operation is performed on a target memory cell, it will cause interference to non-target memory cells, which is the problem of crosstalk between memory cells (Cell Disturb) that is often mentioned. With the continuous development of related technologies of NOR Flash, in the NOR Flash process of 65nm and below nodes, due to the further shrinking of the size of memory cells, the problem of crosstalk between me...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/56
Inventor 许毅胜熊涛于法波刘钊
Owner GIGADEVICE SEMICON (BEIJING) INC