Testing method of interference among memory cells in nor flash memory

Abstract

The invention discloses a testing method of interference among memory cells in a nor flash memory. The testing method comprises the following steps: providing a testing structure for simulating a memory array of the nor flash memory; sequentially programming and erasing memory cells in a testing structure and defining the second memory cell and the fourth memory cell as a first erasing unit and a second erasing unit; programming the first memory cell and the third memory cell and defining the first memory cell and the third memory cell as a first programming unit and a second programming unit; reading a target memory cell and evaluating the influence of reading interference on the programming units and the erasing units; programming the target memory cell and evaluating the influences of word line interference and bit line interference on the programming units and the erasing units simultaneously; and pressurizing a base of the target memory unit and evaluating the influence of the base interference on the programming units and the erasing units. According to the testing method, the operational condition of the practical memory array can be well simulated, the testing design is optimized and the testing time is shortened.

Description

technical field [0001] The invention relates to the technical field of non-volatile memory, in particular to a method for testing crosstalk between storage units in NOR flash memory. Background technique [0002] NOR Flash is a kind of non-volatile flash memory. Its characteristic is that the application program can run directly in the flash memory, and it is not necessary to read the code into the random access memory of the system, so that it has high transmission efficiency. Therefore, NOR Flash has been widely used. [0003] In NOR Flash, when the target storage unit is erased or programmed, it will cause interference to the non-target storage unit. This is the problem of crosstalk between storage cells (Cell Disturb) that is often mentioned. With the continuous development of related technologies of NOR Flash, in the NOR Flash process of 65nm and below nodes, due to the further shrinking of the size of memory cells, the problem of crosstalk between memory cells has bec...

AI Technical Summary

Problems solved by technology

[0005] In view of this, the embodiment of the present invention provides a method for testing crosstalk between memory cells in NOR flash memory, which solves the problem that the test of crosstalk between storage cells in the prior art cannot simulate the operation of a storage array of NOR flash memory and Redundancy in test design and technical issues that take a lot of time in the test process

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