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DDR frequency conversion design method and device

A technology of a frequency conversion device and a design method, applied in the field of data communication, can solve the problems of cumbersome steps, high hardware cost, complicated operation and the like

Active Publication Date: 2015-08-19
FUZHOU ROCKCHIP SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Therefore, it is necessary to provide a technical solution for DDR frequency conversion to solve the problems of complex operation, cumbersome steps, and high hardware cost when performing DDR frequency conversion.

Method used

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  • DDR frequency conversion design method and device
  • DDR frequency conversion design method and device

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Embodiment Construction

[0043] In order to explain in detail the technical content, structural features, achieved goals and effects of the technical solution, the following will be described in detail in conjunction with specific embodiments and accompanying drawings.

[0044] see figure 1, is a schematic diagram of a DDR frequency conversion device according to an embodiment of the present invention. The device includes an SDRAM module 101, an AXI master module 102, an APB slave module 103, an instruction storage module 104, an instruction analysis module 105, and a DMA instruction reading module 106; the SDRAM module is connected with the AXI master102 module, and the AXI master102 module Connect with instruction analysis module 105, described instruction analysis module 105 is connected with instruction storage module 104, and described instruction storage module 104 is connected with DMA instruction reading module 106, and described DMA instruction reading module 106 is connected with AXI master ...

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Abstract

The present invention discloses a DDR frequency conversion design method and device. The design method is applied to a DDR frequency conversion device. The device comprises an SDRAM module, an AXI master module, an APB slave module, an instruction storage module, an instruction parsing module, a DMA instruction reading module. The method comprises the following steps of: the SDRAM module storing CPU instruction data; after receiving a start instruction, the APB slave module transmitting the start instruction to the DMA instruction reading module; after receiving the start instruction, the DMA instruction reading module obtaining the instruction data from the SDRAM module, and storing the obtained instruction data in the instruction storage module; instruction parsing module parsing the instruction data stored in the instruction storage module, and transmitting the parsed instruction data to the AXI master module. By adopting the design method, the operation processes of instruction reading, storage, and parsing during DDR frequency conversion are greatly simplified; meanwhile, the hardware cost is reduced, the DDR frequency conversion becomes fast and efficient, and therefore the system power consumption is reduced.

Description

technical field [0001] The invention relates to the technical field of data communication, in particular to a DDR frequency conversion design method and device. Background technique [0002] With the development of science and technology and the progress of society, people's daily life has been greatly improved, and electronic equipment has sprung up like mushrooms after rain, showing a thriving scene. During the operation of the SOC system, the DDR operating frequency is very important to the power consumption. If the DDR frequency is kept at a high state for a long time, although it can meet the needs of running applications, the electronic device is in standby or does not call the application. When the status of the program is changed, it also causes a waste of resources and a large power consumption. However, if the DDR is kept in a low state, it will not be able to meet the needs of running applications and bring bad experience to users. Therefore, in order to optimiz...

Claims

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Application Information

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IPC IPC(8): G06F13/28
CPCG06F13/28G06F2213/2804Y02D10/00
Inventor 陈勇全
Owner FUZHOU ROCKCHIP SEMICON
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