Multipath paralleling data acquisition system based on on-site programmable gate array

Abstract

A multiplex parallel data acquisition system based on a field programmable gate array is composed of a simulated modulation module, an ADC module, a power module, a press key, USB, an FPGA chip, JTAG, EPCS, an SDRAM memory, an SRAM memory, a Flash memory and an upper computer. The USB realizes the communication between the FPGA chip and the upper computer. The peripheral equipment of the SDRAM memory, the JTAG and the EPCS are respectively connected to an Avalon bus inside the FPGA chip through respective control core and the SRAM memory and the Flash memory are connected to the Avalon bus through a tristate bus line; and the power module supplies power to all the devices above. The system effectively solves the contradiction that CPU resources are occupied for long time in ADC conversion and processing process, and is characterized by simple structure and rapid data reading and storage.

Description

technical field [0001] The present invention relates to data acquisition, in particular to a multi-channel parallel data acquisition system based on Field Programmable Gate Array (Field Programmable Gate Array, FPGA for short). Background technique [0002] In the laser Doppler sound measurement system, a beam of laser light is emitted to the interface between air and water, and the detected signal can be obtained through velocity demodulation and frequency detection to obtain the emission frequency of the underwater sound field by measuring the vibration frequency of the water interface. , the obtained signal is converted through photoelectricity to obtain an electrical signal carrying phase information, and then the communication between the underwater target and the surface platform is realized through the data acquisition system. [0003] Due to the fluctuation of the water surface and the disturbance of the waves, the laser detection signal cannot reach the receiving sy...

AI Technical Summary

Problems solved by technology

Random Access Memory (RAM for short) is used as the data storage medium, and the internal RAM resources of the FPGA are very limited, which limits the data transmission rate

When the system expands, because the resources on the DSP cannot be changed at will, the adjustment and expansion of the system are subject to certain restrictions.

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