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A data processing method and processor

A data processing and processor technology, applied in the computer field, can solve problems such as inability to combine transaction memory, and achieve the effects of improving operating performance and scalability, speeding up execution efficiency, and improving execution efficiency.

Active Publication Date: 2018-08-24
ALIBABA GRP HLDG LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, if the early invalidation processing is directly applied to the existing Transaction memory technology, since the early invalidation processing requires changing the global data state, it is completely opposite to the implementation method of Transaction Memory (the transaction memory processing process must hide the state at the time of update), Therefore, it cannot be simply combined with Transaction memory

Method used

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  • A data processing method and processor
  • A data processing method and processor
  • A data processing method and processor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0064] Embodiment 1. A data processing method, such as image 3 shown, including:

[0065] S1. The first processor starts transaction processing, and reads the first data into the private cache;

[0066] S2. The first processor writes the first data in the private cache, and starts submitting the transaction memory after completion;

[0067] S3. If the last modification of the first data before being written by the first processor is performed by the second processor, write the first data in the private cache of the first processor to In the LLC, invalidating the first data in the private cache of the first processor;

[0068] S4. The transaction memory is submitted.

[0069] In this embodiment, the processor that updated the first data last before the first processor write operation can be known according to the first status indication string of the cache line of the first data in the LLC directory; if it is the processor, It can be processed according to the existing sch...

Embodiment 2

[0132] Embodiment 2. A processor applied in a multi-core processing device, comprising:

[0133] private cache, submission unit;

[0134] A reading unit, configured to read the first data into the private cache when the processor starts transaction processing;

[0135] A write operation unit, configured to perform a write operation on the first data in the private cache, and instruct the commit unit to start committing the transactional memory after completion;

[0136] The invalidation unit is used for when the commit unit starts committing the transaction memory and before completing the commit of the transaction memory, if the last change of the first data before being written by the processor is performed by other processors, then writing the first data in the private cache to the LLC, and invalidating the first data in the private cache of the processor.

[0137] In an implementation manner of this embodiment, the processor may further include:

[0138] A setting unit,...

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Abstract

The present application provides a data processing method and a processor; the method includes: the first processor starts transaction processing, and reads the first data into a private cache; the first processor performs processing on the first data in the private cache After the write operation is completed, start to submit the transactional memory; if the last change of the first data before being written by the first processor is performed by the second processor, then the private cache of the first processor The first data is written to the last level cache LLC, and the first data in the private cache of the first processor is invalidated; the commit of the transactional memory is completed. The application can reduce rollback events caused by data conflicts in a multi-core system, and accelerate the operation of key areas.

Description

technical field [0001] The invention relates to the field of computers, in particular to a data processing method and a processor. Background technique [0002] In recent years, processor manufacturers have been limited by power consumption and temperature, and in order to maintain the continuous growth of high-performance computing, computers have developed towards multi-core computer architectures. In order to make full use of the multi-core architecture, the application program is split into multiple threads that can run independently on a single CPU, so that the designed program can be executed in parallel to improve the overall operating efficiency. [0003] An example of the mainstream design scheme of the current multi-core architecture is as follows: Figure 1a and Figure 1b as shown, Figure 1a There are 16 CPU cores in China, which can access each other through routing (thick lines in the figure). Figure 1b In is the frame of each processor, where *Ln represent...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/0817G06F12/10
CPCG06F12/0808G06F12/0811G06F2212/283Y02D10/00G06F9/467
Inventor 马凌姚四海张磊
Owner ALIBABA GRP HLDG LTD
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