FinFETs With Contact-all-around

Abstract

An integrated circuit structure includes a semiconductor substrate, a semiconductor fin over the semiconductor substrate, a gate stack on a top surface and a sidewall of the semiconductor fin, a source / drain region on a side of the gate stack, and a contact plug encircling a portion of the source / drain region.

Description

technical field [0001] The present invention relates generally to the field of semiconductors, and more particularly to FinFET transistors. Background technique [0002] Transistors generally include semiconductor regions for forming source and drain regions. The contact resistance between the metal contact plug and the semiconductor region is high. Therefore, a metal silicide is formed on the surface of a semiconductor region such as a silicon region, a germanium region, and a silicon germanium region to reduce contact resistance. A contact plug is formed in contact with the silicide region, and the contact resistance between the contact plug and the silicide region is low. [0003] A typical silicidation process includes: forming a metal layer on the surface of the semiconductor region, and then performing annealing, so that the metal layer reacts with the semiconductor region to form a silicide region. After the reaction, the upper part of the metal layer may remain un...

AI Technical Summary

Problems solved by technology

Therefore, the contact resistance of the source and drain regions of the FinFET becomes a more and more serious problem

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