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Resistive random access memory (reram) and conductive bridge random access memory (cbram) cross-coupled fuse and reading method and system

A resistive memory, resistive random technology, applied in static memory, read-only memory, digital memory information, etc., can solve the problem of disturbing memory "resistance value" and so on

Active Publication Date: 2019-07-26
MICROCHIP TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If a unipolar read operation is used to read the state of a memory cell, the resistance value "remembered" by the memory cell will be disturbed

Method used

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  • Resistive random access memory (reram) and conductive bridge random access memory (cbram) cross-coupled fuse and reading method and system
  • Resistive random access memory (reram) and conductive bridge random access memory (cbram) cross-coupled fuse and reading method and system
  • Resistive random access memory (reram) and conductive bridge random access memory (cbram) cross-coupled fuse and reading method and system

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Embodiment Construction

[0020] By arranging conductive and non-conductive resistive memory cells in a cross-coupled arrangement to facilitate reading data states, the resistance values ​​of the memory cells can have very small differences and still be read correctly. This allows the resistance of both of the memory cells to vary over time and still have enough difference between their resistances to read the programmed desired data state.

[0021] According to various embodiments, an arrangement may be provided for a read operation that exposes a selected resistive memory device to an electric field that does not substantially change the conduction state of the resistive memory device and, additionally, may be provided at Consistent adaptive built-in trip points between logic one (ON) and logic zero (OFF) states of the memory device. A one-bit memory cell includes two resistive memory devices.

[0022] Potential uses of this read arrangement and operation are low frequency read operations and low no...

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Abstract

By arranging both conductive and non-conductive resistive memory cells in a cross-coupled arrangement to facilitate reading data states, the memory cells can have very small differences in their resistance values ​​and still be read correctly. This allows the resistance of both of the memory cells to vary over time and still have enough difference between their resistances to read the programmed desired data state. A pair of ReRAM or CBRAM resistive memory devices is configured as a one-bit memory cell and is used to store a single bit of data, wherein one of the resistive memory devices is in an erased condition and the other resistive memory device of the pair is Device is in write condition. Because there are trip points between their conductive states, reading the resistive state of the pair of resistive memory devices is accomplished without the use of a reference voltage or current.

Description

[0001] Related applications [0002] This application claims priority to commonly owned US Patent Provisional Application No. 61 / 775,337, filed March 8, 2013, which is hereby incorporated by reference for all purposes. technical field [0003] The present invention relates to Resistive Random Access Memory (ReRAM) and Conductive Bridge Random Access Memory (CBRAM), and in particular to a ReRAM and CBRAM cross-coupled fuse and reading method and system. Background technique [0004] Resistive RAM is based on the concept that a dielectric (which is usually insulating) can be forced to conduct electricity. This may be achieved, for example, by at least one filament or conductive path formed after application of a sufficiently high voltage across the dielectric material. Various mechanisms (eg, defects, metal migration, etc.) can lead to the formation of this conductive path. Once a conductive path is formed, it can be reset (eg, cut) resulting in high resistance or set (eg, ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C17/16G11C13/00G11C7/06G11C14/00G11C17/18
Inventor 特拉杨·邦塔斯克劳迪-杜米特鲁·内基福尔朱利安·杜米特鲁肯特·休依特
Owner MICROCHIP TECH INC
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