CDSEM measuring method of wafer layout

Abstract

The invention relates to a CDSEM measuring method of a wafer layout. The CDSEM measuring method comprises a step (a) of selecting a measuring pattern and checking whether the measuring pattern is used as a positioning pattern, and a step (b) of selecting the positioning pattern of the measuring pattern and checking whether the positioning pattern is one of all measuring patterns so that the measuring pattern as a positioning pattern of another measuring pattern is prevented from electronic radiation for multiple times in CDSEM measurement. The measuring pattern is checked trough the two steps in the method, and the two steps are respectively the step of checking whether the measuring pattern is used as the positioning pattern in the layout and a step of detecting whether the positioning pattern is taken as the measuring pattern so that the measuring pattern is taken as the positioning pattern of the another measuring pattern and is prevented from the electronic radiation for the multiple times in the CDSEM measurement to ensure measuring accuracy of the measuring pattern.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular, the invention relates to a CDSEM measurement method of a wafer layout. Background technique [0002] Integrated circuit manufacturing technology is a complicated process, and the technology is updated very quickly. A key parameter that characterizes integrated circuit manufacturing technology is the minimum feature size, that is, critical dimension (CD). The size of the critical dimension has developed from the initial 125 microns to the current 0.13 microns, or even smaller. Smallness makes it possible to have millions of devices per chip. [0003] Along with the continuous shrinkage of semiconductor device size, the logic area troubleshooting (Logicareadebug) of described device becomes more difficult, because the fault zone or the place with defect are difficult to find, the method for finding defect point (weakpoint) in the prior art is usually In order to first input the design...

AI Technical Summary

Problems solved by technology

However, there are still many deficiencies in the method, wherein the measured pattern A is bombarded by electrons as the positioning pattern of another measured pattern B when the CDSEM measurement is performed, and when the measured pattern A is measured, it is necessary to again. The measured pattern A is bombarded by electrons, so the measured pattern A will be bombarded by electrons twice during the whole measurement process, so that the measurement results of the measured pattern A are not enough to produce deviations and not accurate enough

[0005] Therefore, when detecting defect points in the prior art, some of the measured patterns become positioning patterns and are bombarded by electrons, and will be bombarded again during measurement, resulting in inaccurate measurement results. However, there is no method in the prior art to ensure that the test pattern It is not used as a positioning pattern, so it is necessary to improve the existing technology in order to eliminate the above problems and improve the accuracy of measurement

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