CMP (Chip Multiprocessor)-based multi-speculative path thread partitioning method under speculative multithreading mechanism

A path line and multi-threading technology, applied in the computer field, can solve problems such as revocation, and achieve the effect of reducing the revocation rate and expanding the branch coverage

Inactive Publication Date: 2015-12-09
XI AN JIAOTONG UNIV
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Problems solved by technology

[0005] The purpose of the present invention is to solve the problem of high probability revocation due to the mutual interference of threads excited between different paths caused by multiple speculative paths in the process of thread division, and to provide a mul...

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  • CMP (Chip Multiprocessor)-based multi-speculative path thread partitioning method under speculative multithreading mechanism
  • CMP (Chip Multiprocessor)-based multi-speculative path thread partitioning method under speculative multithreading mechanism
  • CMP (Chip Multiprocessor)-based multi-speculative path thread partitioning method under speculative multithreading mechanism

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Embodiment Construction

[0034] The present invention will be described in further detail below in conjunction with the accompanying drawings. What has been described is by way of explanation, not limitation, of the invention.

[0035] see figure 1, the speculative multi-threaded system shown is mainly composed of two parts, the compiler and the simulator. Among them, the compiler part includes a program analyzer and a thread divider. The function of the program profiler is to analyze the source program to be processed in trial run, extract statistical information related to the input program, such as branch probability, loop body and process dynamic instruction number, and add the statistical information to the corresponding instruction in the form of comments middle. The thread profiler includes a path selection module, a control subgraph segmentation module, an excitation position selection module and a pre-calculated segment generation module. to reduce the overall complexity of thread divisio...

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Abstract

The invention discloses a CMP (Chip Multiprocessor)-based multi-speculative path thread partitioning method under a speculative multithreading mechanism. According to the method, a process is taken as a unit in thread partitioning; for each process, control-independence nodes of thread end points in the process are limited during partitioning; mutual exclusion path segments of thread excitation points in the process are limited, so that excitation of the thread is relatively strictly limited; meanwhile, the excitation points on the mutual exclusion path segments are made to correspond to the same thread end point; a plurality of continuous pre-computation slices are inserted behind the thread end points; the contents of the pre-computation slices are mutually different along with the changes of the speculative paths and the excitation points; and a simulator carries out different speculative paths when running, and selects corresponding pre-computation slices for executionaccording to the corresponding excitation points on the speculative paths. According to the method, thread partitioning can be carried out on a plurality of paths, so that the branch coverage rate of speculative parallel execution is increased.

Description

technical field [0001] The invention belongs to the field of computers and relates to a CMP-based speculative multithreading technology, in particular to a multi-speculative path thread division method under the CMP-based speculative multithreading mechanism. Background technique [0002] Speculative Multithreading (SpeculativeMultithreading, SpMT) is a software-hardware cooperative program automatic parallelization technology, which can improve the execution efficiency of general-purpose serial programs on multi-core hardware. The compiler adopts an aggressive thread division strategy for serial programs, which does not fully guarantee the independence of each thread, but allows certain data dependence and control dependence between threads. During the thread execution process, the multi-core hardware detects the running status of the thread. If a dependency violation is detected, the hardware makes the program automatically recover from the error, so as to ensure the corre...

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Application Information

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IPC IPC(8): G06F9/38
Inventor 赵银亮王启明李美蓉
Owner XI AN JIAOTONG UNIV
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