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2 results about "Automatic parallelization" patented technology
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Automatic parallelization, also auto parallelization, autoparallelization, or parallelization, the last one of which implies automation when used in context, refers to converting sequential code into multi-threaded or vectorized (or even both) code in order to utilize multiple processors simultaneously in a shared-memory multiprocessor (SMP) machine. The goal of automatic parallelization is to relieve programmers from the hectic and error-prone manual parallelization process. Though the quality of automatic parallelization has improved in the past several decades, fully automatic parallelization of sequential programs by compilers remains a grand challenge due to its need for complex program analysis and the unknown factors (such as input data range) during compilation.
System and method for designing general-purpose static multi-issue integrated circuits using static automatic parallelization code
A system and method for designing a general-purpose static multi-issue CPU using static pipelining of automatically parallelized code is proposed. A multicore and / or multiprocessor integrated circuit has multiple processing units and / or processing pipelines that simultaneously process instructions for data by executing parallelized processing machine code. The execution of parallelized processing code by a multicore and / or multiprocessor integrated circuit that performs parallel processing involves the occurrence of latency, which is given by the idle time of the processing unit between the time the processing unit processes a particular block of instructions in the processing code for data and sends the data back, and the time the processing unit receives the data necessary to execute a successive block of instructions in the processing code. The parallel pipeline includes means for (i) forwarding by providing data forwarding from the MEM stage as an EX / MEM register to the EX stage as an ID / EX stage register, (ii) exchange by providing result exchange between pipelines by making the Ex-MEM stage register results accessible to the EX stage of the parallel pipeline, and (iii) means for branch pipeline flushing with control hazards by flushing only pipelines that depend on one pipeline that calculates conditions based on branch addresses.
Owner:マイナティックス アーゲー
Hardware-optimized symmetric high-performance automated parallelization system with loop-level parallelization and method thereof
A symmetric automatic compiler system (1) and method for high-performance, hardware-optimized automatic parallelization of program code (3) for execution by a multicore or multiprocessor parallel processing system (2) having multiple processing units (21) that simultaneously process instructions for data in a parallel processing system (2) by executing program code (3). The automatic compiler system (1) converts the sequential source code (31) of program code (3) into parallel processing machine code (32) which includes several instructions that can be executed by multiple processing units (21) of the parallel processing system (2) or that control the operation of multiple processing units (21).
Owner:マイナティックス アーゲー