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Finfet with back-gate

A finfet and back gate technology, applied in the field of microelectronics, can solve the problems of reducing the effect of the first gate and the impossibility of placing the second gate, so as to reduce the change of the threshold voltage, optimize the stress and improve the mechanical stability Effect

Inactive Publication Date: 2015-12-09
SOITEC SA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, since the finFET already has gates placed on both sides of the channel, placing a second gate is not possible
In fact, placing the second gate on one of the two sides of the finFET would require removal of the first gate from that side, reducing the contribution of the first gate to the channel

Method used

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Examples

Experimental program
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Embodiment Construction

[0046] will now refer to Figure 1A and Figure 1B A first dual-gate finFET 1000 according to an embodiment of the present invention is described.

[0047] in particular, Figure 1A schematically shows a top view of a dual-gate finFET 1000, while Figure 1B exist Figure 1B The left part schematically shows a cross-section of the dual-gate finFET 1000 taken along the line BB', in Figure 1B The right portion of , schematically shows a cross-section of the double-gate finFET 1000 taken along either line AA' or line CC'. Also, for ease of understanding, Figure 1A There is an opening CUT1 so that the layers below the front grid FG are visible. It should be recognized that in Figure 1A and Figure 1BAs well as in the other figures described below, only the most relevant layers are shown. Those skilled in the art will appreciate that, for example, to connect the dual gate finFET 1000 to other components, additional metal connections and / or vias may be necessary. Similarly, ...

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PUM

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Abstract

The present invention relates to a double-gate finFET (1000) comprising: at least two fins (FIN) realizing a single channel; a back-gate (BG) placed between the fins; and a front-gate (FG), placed outside of the fins. Further, the invention relates to a manufacturing process, resulting in the double-gate finFET.

Description

technical field [0001] The present invention relates to the field of microelectronics. More specifically, the invention relates to finFETs having two gates acting on their channel. Background technique [0002] Recently, the trend to reduce the size of microelectronic components, such as integrated transistors, has become increasingly difficult to maintain. Standard CMOS architectures have reached critical dimensions where previously negligible effects now limit the possibility of further scaling down. [0003] To overcome this drawback, new transistor architectures have been proposed. One of them is the so-called finFET. A finFET is a transistor comprising a thin semiconductor layer (fin) acting as a channel, surrounded by a gate in at least two directions. The most common means consist in implementing a vertical fin and obtaining the gate by two vertical walls adjacent to the fin. In this way, the effect of the gate on the fin can be enhanced, enabling a further reduc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/66H01L29/78
CPCH01L29/7855H01L29/66795H01L29/7845H01L21/30604H01L21/308H01L29/66484H01L29/7843
Inventor C·马聚尔F·霍夫曼
Owner SOITEC SA